Results 1 to 10 of about 147,520 (232)
Spur-reduction techniques for PLLs using sub-sampling phase detection [PDF]
, 2010 A low-spur sub-sampling PLL exploits an amplitude-controlled charge pump which is immune to current source mismatch. A DLL/PLL dual-loop architecture and buffering reduces the disturbance of the sampler to the VCO. The 2.2GHz PLL in 0.18-μm CMOS achieves
Bohsali, Mounhir +4 more
core +4 more sources
Variable gradient-based phase locked loop for accurate frequency estimation of distorted grids [PDF]
Scientific ReportsA variable gradient-based phase locked loop (VG-PLL) is developed for distorted grids. Firstly, the large-signal model of the synchronous reference frame phase locked loop (SRF-PLL) with harmonic disturbances is established, and the large-signal model ...
Xiaoben Lei +5 more
doaj +2 more sources
Hydrogeological Aspects of the Municipal Water Supply of Albania: Situation and Problems
Hydrology, 2023 The municipal water supply, related mainly to the cities of Albania, began to develop in the second half of the 19th century and very intensively after 1945.
Romeo Eftimi +2 more
doaj +1 more source
Design and Simulation of Sigma-Delta Fractional-N Frequency Synthesizer for WiMAX [PDF]
Engineering and Technology Journal, 2008 This paper presents a design and simulation of proposed frequency synthesizer whichcan be used for WiMAX. Design parameters for the proposed fractional-N PLLsynthesizer for WiMAX system are either selected from WiMAX standards oraccording to results of ...
H. T. Ziboon, H.M. Azawi
doaj +1 more source
Design of a DVI video receiver chip
Dianzi Jishu Yingyong, 2022 In this paper, a DVI(Digital Visual Interface) receiver chip is designed and an all-digital-based T.M.D.S signal reception recovery scheme is proposed. This scheme can greatly reduce the design difficulty of PLL and the hardware overhead of the chip.This
Gu Hong, Fang Zhen
doaj +1 more source
Tecnología en Marcha, 2020 El Stellarator de Costa Rica 1 (SCR-1) es un dispositivo pequeño de confinamiento magnético de tipo stellarator modular que se emplea para la investigación de plasmas de alta temperatura y baja densidad, el primero de América Latina. [1]. El propósito de
Jorge Sanchez Castro, Ivan Vargas
doaj +1 more source
Design and Simulation of Digital PLL Synchronizer for BPSK and QPSK Based on Software Defined Radio [PDF]
Engineering and Technology Journal, 2009 This paper presents a design and simulation of digital PLL synchronizer, usingCostas loop based on SDR for high frequency communication systems. Designparameters are selected for each unit of the proposed systems in order toaccommodate SDR requirements ...
H. T. Ziboon, A. A. Thabit
doaj +1 more source
An evaluation of the accuracy of inverter sync angle during the grid's disturbances
Metrology and Measurement Systems, 2020 The grid-tied inverter synchronizes with the network on the basis of the instantaneous voltage phase angle. This angle is computed by the so-called synchronization algorithms.
Wojciech Jarzyna +2 more
doaj +1 more source
Optimization of PLL frequency synthesizer [PDF]
Омский научный вестник, 2019 The influence of different configurations of phase-locked loop frequency (PLL) with integer coefficients on parameters of the PLL loop of the frequency synthesizer is considered.
G. A. Koshuk +2 more
doaj +1 more source
Time-Based High-Pass, Low-Pass, Shelf, and Notch Filters
Elektronika ir Elektrotechnika, 2023 This paper presents formulations for time-based first-order and second-order high-pass, shelf, and notch filters. These formulations are an extension to the existing literature where low-pass filters are already developed using a multiphase controlled ...
Nicolai J. Dahl +2 more
doaj +1 more source