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Overcoming the rate-power trade-off: multi-junction photovoltaic receivers for efficient near-infrared power and gigabit data transmission. [PDF]

open access: yesNPJ Wirel Technol
Pellegrino C   +11 more
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Power characteristics of Networks on Chip

Proceedings of 2010 IEEE International Symposium on Circuits and Systems, 2010
Power characteristics of different Network on Chip (NoC) topologies are developed. Among different NoC topologies, the Butterfly Fat Tree (BFT) dissipates the minimum power. With the advance in technology, the relative power consumption of the interconnects and the associate repeaters of the BFT decreases as compared to the power consumption of the ...
Mohamed A. Abd El-Ghany   +3 more
openaire   +1 more source

Characteristics of Power Cable Shielding

Transactions of the American Institute of Electrical Engineers. Part III: Power Apparatus and Systems, 1960
WITHIN the past few years, there have been a number of interesting papers relating to the characteristics of power cable shielding, covering both theoretical and experimental work being done in this field. At the laboratory of the Simplex Wire & Cable Company, it was felt that added knowledge of the phenomena involved might be obtained if experiments ...
T. N. Mitropoulos   +2 more
openaire   +1 more source

On Powers of the Characteristic Function

Mediterranean Journal of Mathematics, 2020
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
openaire   +1 more source

Power-delay characteristics of CMOS multipliers

Proceedings 13th IEEE Sympsoium on Computer Arithmetic, 2002
Minimizing the power consumption of circuits is important for a wide variety of applications both because of increasing levels of integration and the desire for portability. Since multipliers are widely used in computers, it is also important to maximize their speed.
Thomas K. Callaway   +1 more
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Power-delay characteristics of CMOS adders

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1994
An approach to designing CMOS adders for both high speed and low power is presented by analyzing the performance of three types of adders - linear time adders, logN time adders and constant time adders. The representative adders used are a ripple carry adder, a blocked carry lookahead adder and several signed-digit adders, respectively.
Chetana Nagendra   +2 more
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Power characteristics of Asynchronous Networks-on-Chip

2011 IEEE International SOC Conference, 2011
Power characteristics of different Asynchronous Network on Chip (NoC) architectures are developed. Among different NoC architectures, the Butterfly Fat Tree (BFT) dissipates the minimum power. With increasing the number of IP blocks, the relative power consumption of the interconnects and the associate repeaters of the Asynchronous NoC architecture ...
Maher Rashed   +2 more
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