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The design of a cooling system is critical in power converters based on wide-bandgap (WBG) semiconductors. The use of gallium nitride enhancement-mode high-electron-mobility transistors (GaN e-HEMTs) is particularly challenging due to their small size ...
David Lumbreras +5 more
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Recent Advances in Thermal Interface Materials for Thermal Management of High-Power Electronics
With the increased level of integration and miniaturization of modern electronics, high-power density electronics require efficient heat dissipation per unit area.
Wenkui Xing +3 more
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Tunnel Field-Effect Transistors (TFETs) have been considered one of the most promising technologies to complement or replace CMOS for ultra-low-power applications, thanks to their subthreshold slope below the well-known limit of 60 mV/dec at room ...
Chiara Elfi Spano +6 more
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This work considers the DC part of a hybrid AC/DC microgrid with a meshed topology. We address cost minimization, battery scheduling and the power loss minimization within the power distribution network through constrained optimization. The novelty comes
Igyso Zafeiratou +2 more
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Design of an Efficient Parallel Comparator Architecture for Low Power Delay Product
A binary comparator architecture is proposed in this work for static logic to achieve both low-power and high-performance operations. It also presents a detailed timing performance and power analysis of various state-of-the-art comparator designs.
Mangal Deep Gupta, Rajeev Kumar Chauhan
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A novel approach for designing of variability aware low-power logic gates
Metal-oxide-semiconductor field-effect transistors (MOSFETs) are continuously scaling down in the nanoscale region to improve the functionality of integrated circuits.
Vijay Kumar Sharma
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TAEO-A Thermal Aware & Energy Optimized Routing Protocol for Wireless Body Area Networks
Wireless Body Area Networks (WBANs) are in the spotlight of researchers and engineering industries due to many applications. Remote health monitoring for general as well as military purposes where tiny sensors are attached or implanted inside the skin of
Mohsin Javed +5 more
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Chip Power-Frequency Scaling in 10/7nm Node
The 10/7nm node has been introduced by all major semiconductor manufacturers (Intel, TSMC, and Samsung Electronics). This article looks at the power-performance benefit of the 10/7nm node as compared to the previous node (14nm).
Phil Oldiges +7 more
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Crosstalk Analysis of On-chip VLSI Interconnects
In this paper dynamic crosstalk is analyzed for coupled on-chip VLSI interconnects in different conditions. The proposed work has taken the MOS transistor analytical expressions. In this work, calculated the transition delays and different timings of the
Manjula Jayamma +3 more
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Method for minimization of power consumption when designing CMOS VLIC [PDF]
Presented are the main methods, making it possible to reduce the value of power dissipation at the design stages of CMOS VLIC. Classification is indicated of the power dissipation sources.
Belous A. I. +2 more
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