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Efficient Simulation of Power Grids
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2010Modern deep sub-micron ultra-large scale integration designs with hundreds of millions of devices require huge grids for power distribution. Such grids, operating with decreasing power supply voltages, are a design limiting factor and accurate analysis of their behavior is of paramount importance as any voltage drops can seriously impact performance or
João M. S. Silva +2 more
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Power efficient clustering algorithm
2009 Fourth International Conference on Digital Information Management, 2009A wireless sensor network (WSN) is a form of network that consists of randomly distributed devices/nodes in a known space. In this kind of environment there are two major concerns that governs the efficiency, availability and functionality of the network, namely power consumption and fault tolerance.
Hasan Al-Hamadi +2 more
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Compiling for performance and power efficiency
2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013Performance and power efficiency are issues that can be addressed by the compiler, due to the fact that the compiler will generate code that will exercise several parts of the processor. The mainstream compilers apply several optimizations in order to improve the quality of the final code, but not all optimizations will result in a performance gain and/
Ewerton Daniel de Lima +3 more
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SDM for Power Efficient Transmission
Optical Fiber Communication Conference, 2017We discuss the principles behind the use of space division multiplexing for power efficient transmission in optical fiber communication systems. Experimental demonstration of these principles are realized in a multicore fiber transmission system.
Yu Sun +5 more
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Power-efficiency study using SPECjEnterprise2010
2013 IEEE International Systems Conference (SysCon), 2013In this paper, we present a case study of the power consumption and performance tradeoffs in Java application servers. We run SPECjEnterprise2010 on two platforms with different CPUs, namely, AMD Phenom II and Intel Atom. We investigate the performance and power consumption behaviors against the increasing system size and the relative performance ...
Hitoshi Oi, Sho Niboshi
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Design of power efficient SPI interface
2014 International Conference on Advances in Computing, Communications and Informatics (ICACCI), 2014This paper is about the design of an SPI interface which is based on the specifications mentioned in the SPI block guide V03.06 by Motorola. The present design includes an additional power down mode-stop mode for power optimization and the standard design has been modified by the technique of clock gating for additional power reduction.
Dwaraka N. Oruganti +1 more
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