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Theta oscillations tag episodic memories for sleep-dependent consolidation. [PDF]
PLoS BiolDenis D +5 more
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Ischemic preconditioning enhances 6-hour sprint, jump, and isometric strength responses to complex training in resistance-trained males: a randomized controlled pilot trial. [PDF]
PeerJZhou L +6 more
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CHI '97 extended abstracts on Human factors in computing systems looking to the future - CHI '97, 1997
Usability studies are usually conducted in a compressed time scale (measured in hours) compared with a user's eventual experience with a product (often measured in years). For this reason, typical usability evaluations focus on success during initial interactions with a product (sea for example Dumas & Redish, 1994 and Nielsen & Mack, 1994). Success on
Keith S. Karn +2 more
openaire +1 more source
Usability studies are usually conducted in a compressed time scale (measured in hours) compared with a user's eventual experience with a product (often measured in years). For this reason, typical usability evaluations focus on success during initial interactions with a product (sea for example Dumas & Redish, 1994 and Nielsen & Mack, 1994). Success on
Keith S. Karn +2 more
openaire +1 more source
Information Processing Letters, 1996
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
R. Balasubramanian, S. V. Nagaraj
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zbMATH Open Web Interface contents unavailable due to conflicting licenses.
R. Balasubramanian, S. V. Nagaraj
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2006 International Conference on Computer Design, 2006
High-performance digital ICs manufactured in deep-submicron technologies tend to draw considerable amounts of power during operation. Power droop describes the impact of power consumption transients on the logic values of a circuit's signal lines and, ultimately, on the correctness of the circuit's operation.
Ilia Polian +3 more
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High-performance digital ICs manufactured in deep-submicron technologies tend to draw considerable amounts of power during operation. Power droop describes the impact of power consumption transients on the logic values of a circuit's signal lines and, ultimately, on the correctness of the circuit's operation.
Ilia Polian +3 more
openaire +4 more sources
2008 IEEE International Test Conference, 2008
The power consumed during test mode is higher than the functional mode and becomes significantly higher for low power devices. The increased heat can result in chip burnouts and reliability issues due to electro-migration. This poster presents the reasons for higher power consumption, its consequences, and various solutions, both at hardware and ...
Swapnil Bahl +2 more
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The power consumed during test mode is higher than the functional mode and becomes significantly higher for low power devices. The increased heat can result in chip burnouts and reliability issues due to electro-migration. This poster presents the reasons for higher power consumption, its consequences, and various solutions, both at hardware and ...
Swapnil Bahl +2 more
openaire +1 more source
A TEST OF REPRODUCTIVE POWER IN SNAKES
Ecology, 2008Reproductive power is a contentious concept among ecologists, and the model has been criticized on theoretical and empirical grounds. Despite these criticisms, the model has successfully predicted the modal (optimal) size in three large taxonomic groups and the shape of the body size distribution in two of these groups. We tested the reproductive power
Scott M, Boback, Craig, Guyer
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The Power of Geary's test of normality
Biometrika, 1974SUMMARY The results of an extensive simulation study investigating the power of Geary's a test for normality are summarized. While there appears to be no specific situation where Geary's test clearly and for practical purposes dominates all other tests of normality, it still has good power properties. This coupled with its computational simplicity make
D'Agostino, Ralph B., Rosman, Bernard
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Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08, 2008
Both average power and peak power specifications of a circuit pose serious problems for the prevalent test methods like scan and built-in self-test. This tutorial discusses the problems and solutions for minimizing power dissipation in these test procedures. Hardware approaches and test vector optimization methods are outlined.
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Both average power and peak power specifications of a circuit pose serious problems for the prevalent test methods like scan and built-in self-test. This tutorial discusses the problems and solutions for minimizing power dissipation in these test procedures. Hardware approaches and test vector optimization methods are outlined.
openaire +2 more sources