Greedy Prefetch for Reducing Off-Chip Memory Accesses in Convolutional Neural Network Inference
InformationThe high parameter and memory access demands of CNNs highlight the need to reduce off-chip memory accesses. While recent approaches have improved data reuse to lessen these accesses, simple and efficient prefetching methods are still lacking.
Dengtian Yang, Lan Chen
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Metropolis-Hastings prefetching algorithms [PDF]
Prefetching is a simple and general method for single-chain parallelisation of the Metropolis-Hastings algorithm based on the idea of evaluating the posterior in parallel and ahead of time.
Strid, Ingvar
core
StriPre: A VM Disk Migration Prefetching Algorithm
IEEE AccessVirtual machine (VM) cross-cloud migration involves relocating virtual machine instances between different cloud environments, offering advantages such as improved scalability, disaster recovery capabilities, and efficient resource allocation ...
Yuchi Chen, Tianlei Xiong
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Adaptive Data Prefetching for File Storage Systems Using Online Machine Learning
Big Data and Cognitive ComputingData prefetching is essential for modern file storage systems operating in large-scale cloud and data-intensive environments, where high performance increasingly depends on intelligent, adaptive mechanisms.
George Savva, Herodotos Herodotou
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5G/B5G mmWave Cellular Networks with MEC Prefetching Based on User Context Information. [PDF]
Sensors (Basel), 2022 Maruta K +4 more
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Clean-prefetcher: look-ahead prefetching without cache pollution
IEICE Electronics Express, 2021 Minshin Cho +2 more
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Cache prefetching strategy based on selective Markov model
Tongxin xuebao, 2010 Through analyzing the existing streaming media cache management algorithm and user’s watching behavior characteristics,a new cache prefetching strategy based on selective Markov model was presented.The strategy,by mod-eling the user’s VCR action of ...
CAI Wei-hong1 +4 more
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Memory Prefetching Evaluation of Scientific Applications on a Modern HPC Arm-Based Processor
IEEE AccessMemory prefetching is a well-known technique for mitigating the negative impact of memory access latencies on memory bandwidth. This problem has become more pressing as improvements in memory bandwidth have not kept pace with increases in computational ...
Nam Ho +4 more
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A Highly Pipelined and Highly Parallel VLSI Architecture of CABAC Encoder for UHDTV Applications. [PDF]
Sensors (Basel), 2023 Fu C, Sun H, Zhang Z, Zhou J.
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Picture archiving and communication systems: past, present, and future. [PDF]
J Med Imaging (Bellingham), 2023 Andriole KP.
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