Results 161 to 170 of about 12,875 (189)
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Proceedings of the 2006 international conference on Wireless communications and mobile computing, 2006
Location dependent data (LDD) are those closedly related to specific locations. Services involving LDD are becoming more and more popular in recent years. To provide a high quality of service for these applications, prefetching LDD before a mobile client reaches the LDD site is an important factor to consider. In this paper, we analyze this problem and
Chao-Chun Chen +3 more
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Location dependent data (LDD) are those closedly related to specific locations. Services involving LDD are becoming more and more popular in recent years. To provide a high quality of service for these applications, prefetching LDD before a mobile client reaches the LDD site is an important factor to consider. In this paper, we analyze this problem and
Chao-Chun Chen +3 more
openaire +1 more source
Proceedings of the 8th ACM International Systems and Storage Conference, 2015
Caches are integral parts in modern computers; they leverage the memory access patterns of a program to mitigate the gap between the fast processors and slow memory components.Unfortunately, the behavior of caches can be exploited by attackers to infer the program's memory access patterns, by carrying out cache-based side-channel attacks, which can ...
Adi Fuchs, Ruby B. Lee
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Caches are integral parts in modern computers; they leverage the memory access patterns of a program to mitigate the gap between the fast processors and slow memory components.Unfortunately, the behavior of caches can be exploited by attackers to infer the program's memory access patterns, by carrying out cache-based side-channel attacks, which can ...
Adi Fuchs, Ruby B. Lee
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PBC: Prefetched Blocks Compaction
IEEE Transactions on Computers, 2016zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Raghavendra, K. +2 more
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ACM SIGARCH Computer Architecture News, 2006
Prefetching in shared-memory multiprocessor systems is an increasingly difficult problem. As system designs grow to incorporate larger numbers of faster processors, memory latency and interconnect traffic increase. While aggressive prefetching techniques can mitigate the increasing memory latency, they can harm performance by wasting precious ...
Jason F. Cantin +2 more
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Prefetching in shared-memory multiprocessor systems is an increasingly difficult problem. As system designs grow to incorporate larger numbers of faster processors, memory latency and interconnect traffic increase. While aggressive prefetching techniques can mitigate the increasing memory latency, they can harm performance by wasting precious ...
Jason F. Cantin +2 more
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Improving Web Prefetching by Making Predictions at Prefetch
2007 Next Generation Internet Networks, 2007Most of the research attempts to improve Web prefetching techniques have focused on the prediction algorithm with the objective of increasing its precision or, in the best case, to reduce the user's perceived latency. In contrast, to improve prefetching performance, this work concentrates in the prefetching engine and proposes the Prediction at ...
B. de la Ossa +3 more
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Non-referenced prefetch (NRP) cache for instruction prefetching
IEE Proceedings - Computers and Digital Techniques, 1996A new conceptual cache, NRP (nonreferenced prefetch) cache, is proposed to improve the performance of instruction prefetch mechanisms which try to prefetch both the sequential and nonsequential blocks under limited memory bandwidth. The NRP cache is used for storing prefetched blocks that were not referenced by the CPU.
G.-H. Park +3 more
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Practical irregular prefetching
2020Memory accesses continue to be a performance bottleneck for many programs, and prefetching is an effective and widely used method for alleviating the memory bottleneck. However, prefetching can be difficult for irregular workloads, which the hardware has no clear patterns like sequential or strided patterns.
Wu, Hao (Ph. D. In Computer Science) +1 more
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Proceedings of the 10th international conference on Mobile systems, applications, and services, 2012
Prefetching is a double-edged sword. It can hide the latency of data transfers over poor and intermittently connected wireless networks, but the costs of prefetching in terms of increased energy and cellular data usage are potentially substantial, particularly for data prefetched incorrectly.
Brett D. Higgins +5 more
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Prefetching is a double-edged sword. It can hide the latency of data transfers over poor and intermittently connected wireless networks, but the costs of prefetching in terms of increased energy and cellular data usage are potentially substantial, particularly for data prefetched incorrectly.
Brett D. Higgins +5 more
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IEEE Transactions on Computers, 2004
The growing difference between processor and main memory cycle time demands the use of aggressive prefetch algorithms to reduce the effective memory access latency. However, prefetching can significantly increase memory traffic and unsuccessful prefetches may pollute the cache.
V. Srinivasan, E.S. Davidson, G.S. Tyson
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The growing difference between processor and main memory cycle time demands the use of aggressive prefetch algorithms to reduce the effective memory access latency. However, prefetching can significantly increase memory traffic and unsuccessful prefetches may pollute the cache.
V. Srinivasan, E.S. Davidson, G.S. Tyson
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Proceedings of the 18th annual international conference on Supercomputing, 2004
The growing dominance of wire delays at future technology points renders a microprocessor communication-bound. Clustered microarchitectures allow most dependence chains to execute without being affected by long on-chip wire latencies. They also allow faster clock speeds and reduce design complexity, thereby emerging as a popular design choice for ...
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The growing dominance of wire delays at future technology points renders a microprocessor communication-bound. Clustered microarchitectures allow most dependence chains to execute without being affected by long on-chip wire latencies. They also allow faster clock speeds and reduce design complexity, thereby emerging as a popular design choice for ...
openaire +1 more source