Results 21 to 30 of about 484,173 (254)
Digital-based processing in-memory [PDF]
Proceedings of the International Symposium on Memory Systems, 2019 Recently, Processing In-Memory (PIM) has been shown as a promising solution to address data movement issue in the current processors. However, today's PIM technologies are mostly analog-based, which involve both scalability and efficiency issues. In this paper, we propose a novel digital-based PIM which accelerates fundamental operations and diverse ...
Mohsen Imani +2 more
openaire +1 more source
CIDAN-XE: Computing in DRAM with Artificial Neurons
Frontiers in Electronics, 2022 This paper presents a DRAM-based processing-in-memory (PIM) architecture, called CIDAN-XE. It contains a novel computing unit called the neuron processing element (NPE).
Gian Singh +3 more
doaj +1 more source
GP-SIMD Processing-in-Memory [PDF]
ACM Transactions on Architecture and Code Optimization, 2015 GP-SIMD, a novel hybrid general-purpose SIMD computer architecture, resolves the issue of data synchronization by in-memory computing through combining data storage and massively parallel processing. GP-SIMD employs a two-dimensional access memory with modified SRAM storage cells and a bit-serial processing unit per each memory row.
Amir Morad, Leonid Yavits, Ran Ginosar
openaire +1 more source
A survey on processing-in-memory techniques: Advances and challenges
Memories - Materials, Devices, Circuits and Systems, 2023 Processing-in-memory (PIM) techniques have gained much attention from computer architecture researchers, and significant research effort has been invested in exploring and developing such techniques.
Kazi Asifuzzaman +4 more
doaj +1 more source
Making Memristive Processing-in-Memory Reliable [PDF]
2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2021 Processing-in-memory (PIM) solutions vastly accelerate systems by reducing data transfer between computation and memory. Memristors possess a unique property that enables storage and logic within the same device, which is exploited in the memristive Memory Processing Unit (mMPU).
Leitersdorf, Orian +2 more
openaire +2 more sources
MADX: Memristors-As-Drivers for Crossbar logic [PDF]
, 2017 Memristors have the potential to not only replace conventional memory, but also to open up new design possibilities because they store 1s and 0s as resistances rather than voltages. A memristor architecture that has attracted interest for its versatility
Sweeny, Thomas Charles
core +1 more source
Apache Mahout’s k-Means vs. fuzzy k-Means performance evaluation [PDF]
, 2016 (c) 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or ...
Barolli, Leonard +3 more
core +1 more source
IEEE Access, 2022 Many modern workloads, such as neural networks, databases, and graph processing, are fundamentally memory-bound. For such workloads, the data movement between main memory and CPU cores imposes a significant overhead in terms of both latency and energy. A
Juan Gomez-Luna +5 more
doaj +1 more source
Resistive GP-SIMD Processing-In-Memory [PDF]
ACM Transactions on Architecture and Code Optimization, 2016 GP-SIMD, a novel hybrid general-purpose SIMD architecture, addresses the challenge of data synchronization by in-memory computing, through combining data storage and massive parallel processing. In this article, we explore a resistive implementation of the GP-SIMD architecture.
Amir Morad +3 more
openaire +1 more source
ReGra: Accelerating Graph Traversal Applications Using ReRAM With Lower Communication Cost
IEEE Access, 2020 There is a growing gap between data explosion speed and the improvement of graph processing systems on conventional architectures. The main reason lies in the large overhead of random access and data movement, as well as the unbalanced and unordered ...
Haoqiang Liu +3 more
doaj +1 more source