Results 31 to 40 of about 484,173 (254)

Achieving the Performance of All-Bank In-DRAM PIM With Standard Memory Interface: Memory-Computation Decoupling

IEEE Access, 2022
Processing-in-Memory (PIM) has been actively studied to overcome the memory bottleneck by placing computing units near or in memory, especially for efficiently processing low locality data-intensive applications.
Yoonah Paik, Chang Hyun Kim, Won Jun Lee, Seon Wook Kim   +3 more
doaj   +1 more source

Stateful Logic Using Phase Change Memory

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2022
Stateful logic is a digital processing-in-memory (PIM) technique that could address von Neumann memory bottleneck challenges while maintaining backward compatibility with standard von Neumann architectures.
Barak Hoffer, Nicolas Wainstein, Christopher M. Neumann, Eric Pop, Eilam Yalon, Shahar Kvatinsky   +5 more
doaj   +1 more source

Declarative Memory Predicts Phonological Processing Abilities in Adulthood

Frontiers in Psychology, 2021
Individual differences in phonological processing abilities have often been attributed to perceptual factors, rather than to factors relating to learning and memory.
Dana T. Arthur, Michael T. Ullman, F. Sayako Earle   +2 more
doaj   +1 more source

Highly Parallel Regular Expression Matching Using a Real Processing-in-Memory System

IEEE Access
Processing-in-Memory (PIM) is an emerging computing paradigm exploiting a cutting-edge memory device (PIM device) that integrates hundreds to thousands of processing units with the memory modules. A data-intensive application running in a host system can
Jeonghyeon Joo, Hyojune Kim, Hyuck Han, Eul Gyu Im, Sooyong Kang   +4 more
doaj   +1 more source

Performance Implications of NoCs on 3D-Stacked Memories: Insights from the Hybrid Memory Cube

, 2018
Memories that exploit three-dimensional (3D)-stacking technology, which integrate memory and logic dies in a single stack, are becoming popular. These memories, such as Hybrid Memory Cube (HMC), utilize a network-on-chip (NoC) design for connecting their
Asgari, Bahar, Garg, Kartikay, Hadidi, Ramyad, Kim, Hyesoon, Krishna, Tushar, Mudassar, Burhan Ahmad, Young, Jeffrey   +6 more
core   +1 more source

FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture

, 2019
Neural Network (NN) accelerators with emerging ReRAM (resistive random access memory) technologies have been investigated as one of the promising solutions to address the \textit{memory wall} challenge, due to the unique capability of \textit{processing ...
Hu, Xing, Ji, Yu, Li, Shuangchen, Wang, Peiqi, Xie, Xinfeng, Xie, Yuan, Zhang, Youhui, Zhang, Youyang   +7 more
core   +1 more source

SuperChat: Dialogue Generation by Transfer Learning from Vision to Language using Two-dimensional Word Embedding and Pretrained ImageNet CNN Models

, 2019
The recent work of Super Characters method using two-dimensional word embedding achieved state-of-the-art results in text classification tasks, showcasing the promise of this new approach.
Dong, Jason, Dong, Patrick, Lin, Michael, Sun, Baohua, Yang, Lin, Young, Charles, Zhang, Wenhan   +6 more
core   +1 more source

FourierPIM: High-throughput in-memory Fast Fourier Transform and polynomial multiplication

Memories - Materials, Devices, Circuits and Systems, 2023
The Discrete Fourier Transform (DFT) is essential for various applications ranging from signal processing to convolution and polynomial multiplication. The groundbreaking Fast Fourier Transform (FFT) algorithm reduces DFT time complexity from the naive O(
Orian Leitersdorf, Yahav Boneh, Gonen Gazit, Ronny Ronen, Shahar Kvatinsky   +4 more
doaj   +1 more source

Improving the Performance and Endurance of Persistent Memory with Loose-Ordering Consistency

, 2017
Persistent memory provides high-performance data persistence at main memory. Memory writes need to be performed in strict order to satisfy storage consistency requirements and enable correct recovery from system crashes. Unfortunately, adhering to such a
Lu, Youyou, Mutlu, Onur, Shu, Jiwu, Sun, Long   +3 more
core   +1 more source

ClaPIM: Scalable Sequence Classification Using Processing-in-Memory

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023
Abstract  Deoxyribonucleic acid (DNA) sequence classification is a fundamental task in computational biology with vastimplications for applications such as disease prevention and drug design. Therefore, fast high-quality sequence classifiersare significantly important. This article introduces ClaPIM, a scalable DNA sequence classification architecture
Khalifa, Marcel, Hoffer, Barak, Leitersdorf, Orian, Hanhan, Robert, Perach, Ben, Yavits, Leonid, Kvatinsky, Shahar   +6 more
openaire   +2 more sources