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A processor array module for distributed, massively parallel, embedded computing
Microprocessing and Microprogramming, 1993With the increased degree of miniaturization resulting from the use of modem VLSI technology and the high communication bandwidth available through optical connections, it is now possible to build ...
Lars Bengtsson +2 more
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Variable assignment and instruction scheduling for processor with multi-module memory
Microprocessors and Microsystems, 2011Multi-module memory has been employed in high-end digital signal processing system (DSP). It provides high memory bandwidth and low power operating mode for energy savings. However, making full use of these architectural features is a challenging problem for code optimization.
Lei Zhang 0194 +3 more
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Authentication of Trusted Platform Module Using Processor Response
2014Authentication is the process which allows both the communicating entities to validate each other. Authentication is the base for the trust between the two communicating party if both party wants to properly communicate. Trusted Platform Module (TPM) can be used to securely store artifacts like passwords, certificates, encryption keys or measurements ...
Vikash Kumar Rai, Arun Mishra
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A multi-layered methodology for defect-tolerance of datapath modules in processors
2015 IEEE 33rd VLSI Test Symposium (VTS), 2015Technology scaling increases circuits' susceptibility to manufacturing imperfections and dramatically decreases processor yields. Traditional defect-tolerance approaches add explicit redundant circuitry to improve yield and hence are very expensive for datapath modules in processors.
Hsunwei Hsiung, Sandeep K. Gupta 0001
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Enabling Effective Module-Oblivious Power Gating for Embedded Processors
2017 IEEE International Symposium on High Performance Computer Architecture (HPCA), 2017The increasingly-stringent power and energy requirements of emerging embedded applications have led to a strong recent interest in aggressive power gating techniques. Conventional techniques for aggressive power gating perform module-based power gating in processors, where power domains correspond to RTL modules.
Hari Cherupalli +4 more
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Vertically integrated processor and memory module design for vector supercomputers
2013 IEEE International 3D Systems Integration Conference (3DIC), 2013To overcome the memory and power wall problems on a high performance microprocessor for supercomputer systems, the reduction in memory access latencies and its power consumptions is urgently required. Recently, a 2.5D integration technology, which can integrate multiple chips on a silicon die by using vertical interconnects, are expected as key ...
Ryusuke Egawa +3 more
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A module-sliced approach for high yield VLSI/WSI processors
Proceedings 1989 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2003The module-sliced approach is realized in a reconfigurable fault-tolerant segmented array processor (RFTSAP). The basic building block of RFTSAP is a node which consists of a processor, local memory, and a programmable I/O unit (PIOU). The PIOU allows any group of processors to be combined to perform the functions of a large processor module. The yield
Yi-Chieh Chang, Kang G. Shin
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On module assignment in two-processor distributed systems
Information Processing Letters, 1979R. K. Arora, S. P. Rana
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Optimization of ALU with gated clock and its internal modules in RVIM64 processor
Journal of Physics: Conference Series, 2023Huimin Liu
exaly
ModFuzz: Adaptive Module-Level Fuzzing of Processors
IEEE Transactions on Information Forensics and SecurityHe Wang +6 more
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