Results 151 to 160 of about 1,775 (200)

Memory compact high-speed QC-LDPC decoder

2017 IEEE International Conference on Signal Processing, Communications and Computing (ICSPCC), 2017
In this paper, compact memory strategies for partially parallel Quasi-cyclic LDPC (QC-LDPC) decoder architecture are proposed. By compacting several adjacent rows hard decisions and extrinsic messages into one memory entry, which not only reduces the number of memory banks for hard decisions, but also facilitates multiple data accesses per clock cycle,
Tianjiao Xie, Bo Li, Mao Yang, Zhongjiang Yan   +3 more
openaire   +1 more source

Layered TPMP Decoding for QC-LDPC Codes

Applied Mechanics and Materials, 2012
This paper presents a layered two-phase message passing (L-TPMP) decoding algorithm for general quasi-cyclic low-density parity-check (QC-LDPC) codes, which not only achieves high hardware utilization efficiency (HUE), but also brings in great memory block reduction.
Ling Zhao, Yi Hou, Rong Ke Liu
openaire   +1 more source

Segmented Reconfigurable Cyclic Shifter for QC-LDPC Decoder

2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021
In various wireless communication standards, such as Wi-Fi, WiMAX, and 5G standards, QC-LDPC decoders are required to decode a codeword of variable length. Part of the decoder is in idle if the length of codeword is not the maximum. A reconfigurable cyclic shifter is a key element of a QC-LDPC decoder. If the shifter can only shift one input at a time,
Hing-Mo Lam, Silin Lu, Hezi Qiu, Hailong Jiao, Min Zhang, Shengdong Zhang   +5 more
openaire   +1 more source

Generic Permutation Network for QC-LDPC Decoder

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2010
Permutation network plays an important role in the reconfigurable QC-LDPC decoder for most modem wireless communication systems with multiple code rates and various code lengths. This paper presents the generic permutation network (GPN) for the reconfigurable QC-LDPC decoder.
Xiao PENG, Xiongxin ZHAO, Zhixiang CHEN, Fumiaki MAEHARA, Satoshi GOTO   +4 more
openaire   +1 more source

Template-based QC-LDPC decoder architecture generation

2015 10th International Conference on Information, Communications and Signal Processing (ICICS), 2015
This paper presents an automated template-based approach for layered QC-LDPC architectures. The underlying idea is to be able to generate any number of fairly optimized hardware designs with only a minimum effort required by tuning high level parameters (parity check matrix, number of AP-LLR messages being processed at a time, etc.).
Oana Boncalo, Petru Florin Mihancea, Alexandra Amaricai   +2 more
openaire   +1 more source

A flexible and overlapped QC-LDPC decoder

2008 9th International Conference on Signal Processing, 2008
There are many low-density parity-check (LDPC) decoder architectures in the literature most of which are based on structured codes. Besides been specific to a particular class of codes, suggested architectures are limited in scalability. The major challenge in decoder design and implementation is the consideration of several strongly interrelated ...
openaire   +1 more source

QC-LDPC Code-Based Cryptosystems

2014
In this chapter, the use of QC-LDPC codes in public key cryptosystems inspired to the McEliece and Niederreiter systems is studied. Both the case in which the private and the public code are permutation equivalent and that in which such an equivalence is absent are considered.
openaire   +1 more source

Flexible decoder architectures for irregular QC-LDPC codes

2008 51st Midwest Symposium on Circuits and Systems, 2008
A flexible and power-efficient decoder architecture employing the layered-decoding message-passing algorithm and the low-complexity offset-based Min-Sum check algorithm for irregular QC-LDPC codes is presented in this paper. The architecture is verified by implementing a programmable decoder chip compliant with the QC-LDPC codes in Mobile WiMAX ...
Tzu-Chieh Kuo, Alan N. Willson
openaire   +1 more source

A QC-LDPC Code Based Digital Signature Algorithm

2018 International Conference on Networking and Network Applications (NaNA), 2018
CFS digital signature algorithm, which proposed in 2001, is the most important code based digital signature algorithm and can resist the known attack of quantum algorithms. But the efficiency of CFS is very low because of the extremely low signing speed and the large public key size. In this paper, a variation of CFS algorithm is presented.
Fang Ren, Xuefei Yang, Dong Zheng
openaire   +1 more source

Low Complexity Decoding Algorithm of QC-LDPC Code

2010 IEEE Asia-Pacific Services Computing Conference, 2010
Through the research on the decoding algorithm of low-density parity-check (LDPC) code, a low complexity decoding algorithm suitable for quasi-cyclic LDPC (QC-LDPC) code is proposed in this paper. The algorithm adopts layered decoding (LD), and the sub-minimum is replaced by the sum of an optimal correction factor and the minimum during the process of ...
Fanglong Yi, Pengjun Wang
openaire   +1 more source