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QC-LDPC Code-Based Cryptosystems
2014In this chapter, the use of QC-LDPC codes in public key cryptosystems inspired to the McEliece and Niederreiter systems is studied. Both the case in which the private and the public code are permutation equivalent and that in which such an equivalence is absent are considered.
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Design of masking matrix for QC-LDPC codes
2013 IEEE Information Theory Workshop (ITW), 2013The masking matrix plays an important role in constructing new classes of regular and irregular quasi-cyclic low density parity check (QC-LDPC) codes. By coupling two identical graphs in a special way, we present a new structure of the masking matrix, whose Tanner graph can be seen as a protograph.
Yang Liu, Ying Li
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Combinatorial optimization for improving QC LDPC codes performance
2013 IEEE International Symposium on Information Theory, 2013Techniques for searching for good quasi-cyclic (QC) LDPC block codes of short and moderate lengths which are suitable for practical purposes are studied. To facilitate implementations only codes whose parity-check matrices having bidiagonal structure of their submatrices and consequently having low encoding complexity are considered.
Irina E. Bocharova +2 more
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Efficient Search of Girth-Optimal QC-LDPC Codes
IEEE Transactions on Information Theory, 2016In this paper, we study the cycle structure of quasi-cyclic (QC) low-density parity-check (LDPC) codes with the goal of obtaining the shortest code with a given degree distribution and girth. We focus on QC-LDPC codes, whose Tanner graphs are cyclic liftings of fully connected base graphs of size $3 \times n, n \geq 4$ , and obtain minimal lifting
Alireza Tasdighi +2 more
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Low power decoder design for QC-LDPC codes
Proceedings of 2010 IEEE International Symposium on Circuits and Systems, 2010This paper presents a low-power decoder design approach for generic quasi-cyclic low-density parity-check (QC-LDPC) codes based on the layered min-sum decoding algorithm. To reduce the energy consumption, a novel message length-shortening scheme is explored.
Kai He, Jin Sha, Li Li, Zhongfeng Wang
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Generalization of floor lifting for QC-LDPC codes
2017 IEEE East-West Design & Test Symposium (EWDTS), 2017The given paper presents a method for constructing a QC-LDPC code of shorter length by length adaption from a given QC-LDPC code of maximal length. The proposed method can be considered as a generalization of floor lifting. Making some offline calculation it is possible to construct a sequence of QC-LDPC codes with different circulant sizes generated ...
Vasiliy Usatyuk, Sergey Egorov
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An Efficient Layered Decoding Architecture for Nonbinary QC-LDPC Codes
IEEE Transactions on Circuits and Systems I: Regular Papers, 2012zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Ueng, Yeong-Luh +5 more
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Efficient Decoding of QC-LDPC Codes Using GPUs
2011In this work, we propose an efficient quasi-cyclic LDPC (QCLDPC) decoder simulatorwhich runs on graphics processing units(GPUs). We optimize the data structures of the messages used in the decoding process such that both the read and write processes can be performed in a highly parallel manner by the GPUs.
Yue Zhao +4 more
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On Deriving Good LDPC Convolutional Codes from QC LDPC Block Codes
2007 IEEE International Symposium on Information Theory, 2007In this paper we study the iterative decoding behavior of time-invariant and time-varying LDPC convolutional codes derived by unwrapping QC LDPC block codes. In particular, for a time-varying LDPC convolutional code, we show that the minimum pseudo-weight of the convolutional code is at least as large as the minimum pseudo-weight of the underlying QC ...
Ali Emre Pusane +3 more
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Efficient encoding of QC-LDPC codes related to cyclic MDS codes
IEEE Journal on Selected Areas in Communications, 2008In this paper, we present an efficient systematic encoding algorithm for quasi-cyclic (QC) low-density parity check (LDPC) codes that are related to cyclic maximum-distance separable (MDS) codes. The algorithm offers linear time complexity, and it can be easily implemented by using polynomial multiplication and division circuits.
Norifumi Kamiya, Eisaku Sasaki
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