Results 161 to 170 of about 12,303 (301)
An Implementation of Membrane Computing Using Reconfigurable Hardware
Because of their inherent large-scale parallelism, membrane computing models can be fully exploited only through the use of a parallel computing platform.
Kearney, David +2 more
core
Ferroelectric Devices for In‐Memory and In‐Sensor Computing
Inspired by biological systems, in‐memory and in‐sensor computing overcome von Neumann bottlenecks. Ferroelectric devices can mimic synaptic functions and sense stimuli like light or force, therefore are ideal for these paradigms. This review introduces the ferroelectric devices applied for in‐memory and in‐sensor computing, covering their structures ...
Hong Fang +5 more
wiley +1 more source
SpChipADF: An Architecture Design Framework for Radar Signal Processing Hardware Accelerators. [PDF]
Wang H +8 more
europepmc +1 more source
IMPLEMENTATION OF RECONFIGURABLE COMPUTING CACHE ARCHITECTURE
In a modern microprocessor, a considerable portion of the chip is dedicated to cache memories. However some applications do not utilize all the cache capacity all the time, on the other side these applications may require more computing power than the ...
JUPALLY, RAGHAVENDRA PRASADA RAO
core
Harnessing Phase Separation for the Development of High‐Performance Hydrogels
ABSTRACT Hydrogels are indispensable for the development of next‐generation bioelectronics, soft robotics, and biomedical devices, where their mechanical properties determine performance and reliability. Among strategies to enhance hydrogel mechanics, phase separation enables controlled heterogeneity resulting in gel networks that are reinforced by ...
Yue Shao +3 more
wiley +1 more source
A Scalable Perovskite Platform With Multi-State Photoresponsivity for In-Sensor Saliency Detection. [PDF]
Xing X +10 more
europepmc +1 more source
A reconfigurable physical unclonable function is developed using CMOS‐integrated SOT‐MRAM chips, leveraging a dual‐pulse strategy and offering enhanced environmental robustness. A temperature‐compensation effect arising from the CMOS transistor and SOT‐MTJ is revealed and established as a key prerequisite for thermal resilience.
Min Wang +7 more
wiley +1 more source
Nonvolatile Reconfigurable Synthetic Antiferromagnetic Devices Induced by Spin-Orbit Torque for Multifunctional In-Memory Computing. [PDF]
Song M, Liu J, Zhu Z.
europepmc +1 more source
Instruction-Level Parallelism for Reconfigurable Computing
. Reconfigurable coprocessors can exploit large degrees of instruction-level parallelism (ILP). In compiling sequential code for reconfigurable coprocessors, we have found it convenient to borrow techniques previously developed for exploiting ILP for ...
John Wawrzynek, Timothy J. Callahan
core
Programmable hydration pathways enable reconfigurable ionic thermoelectrics in polyquaternium hydrogels. By coupling microscopic solvation, mesoscale water channels, and macroscopic boundary control, hydration‐gated protonics decouples thermopower, response speed, and stability.
Zehao Zhao, Yun Shen, Dongyan Xu
wiley +1 more source

