Results 231 to 240 of about 59,938 (276)

Reconfigurable computers

Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays, 2005
Reconfigurable Computers are parallel systems that are designed around multiple general-purpose processors and multiple field programmable gate array (FPGA) chips. These systems can leverage the synergism between conventional processors and FPGAs to provide low-level hardware functionality at the same level of programmability as general-purpose ...
Tarek El-Ghazawi, Kris Gaj, Nikitas Alexandridis, Allen Michalski, Devrim Fidanci, Mohamed Taher, Esam El-Araby, Esmail Chitalwala, Proshanta Saha   +8 more
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Reconfigurable-computing technology

Cybernetics and Systems Analysis, 2007
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Palagin, A. V., Opanasenko, V. N.
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SPINTRONIC MEMORY-BASED RECONFIGURABLE COMPUTING

SPIN, 2013
Reconfigurable computing provides a number of advantages such as low Research and Development (R&D) cost and design flexibility when compared to application specific logic circuits (ASLC). However its low power efficiency greatly limits its applications.
Zhao, Weisheng, Brum, Raphael Martins, Torres, Lionel, Klein, Jacques-Olivier, Sassatelli, Gilles, Ravelosona, Dafiné, Chappert, Claude   +6 more
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Reconfigurable neuromorphic computation in biochemical systems

2015 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2015
Implementing application-specific computation and control tasks within a biochemical system has been an important pursuit in synthetic biology. Most synthetic designs to date have focused on realizing systems of fixed functions using specifically engineered components, thus lacking flexibility to adapt to uncertain and dynamically-changing environments.
Chiang, Hui-Ju, Jiang, Jie-Hong, Fages, François   +2 more
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Reconfigurable computing

Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 1999
Reconfigurable computing is emerging as an important new organizational structure for implementing computations. It combines the post-fabrication programmability of processors with the spatial computational style most commonly employed in hardware designs. The result changes traditional "hardware" and "software" boundaries, providing an opportunity for
A. DeHon, J. Wawrzynek
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Reconfigurable Computing Cluster

2012
The Reconfigurable Computing Cluster project has been investigating broad question of what, if any, role FPGAs may play in parallel computing. While this article does not answer that question but describes the experiences thus far. The main vehicle for research has been Spirit, a small-scale experimental machine consisting of 64 FPGAs connected in 3-D ...
Sass Ron, Schmidt Andrew G., Buscemi Scott   +2 more
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Proteus: a reconfigurable computational network for computer vision

Proceedings., 11th IAPR International Conference on Pattern Recognition. Vol. IV. Conference D: Architectures for Vision and Pattern Recognition,, 1995
The Proteus architecture is a highly parallel, multiple instruction, multiple data machine (MIMD) optimized for large granularity tasks such as machine vision and image processing. The system can achieve 20 gigaflops (80 gigaflops peak). It accepts data via multiple serial links at a rate of up to 640 MB/S.
Robert M. Haralick, Arun K. Somani, Craig Wittenbrink, Robert Johnson, Kenneth Cooper, Linda G. Shapiro, Ihsin T. Phillips, Jenq-Neng Hwang, William Cheung, Yung Hsi Yao, Chung-Ho Chen, Larry Yang, Brian Daugherty, Bob Lorbeski, Kent Loving, Tom Miller, Larye Parkins, Steve Soos   +17 more
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Computing on reconfigurable buses

Proceedings of Phoenix Conference on Computers and Communications, 2002
The authors demonstrate novel uses for buses in a multiprocessor reconfigurable architecture both as topological descriptors and as powerful computational devices. This paradigm results in fast algorithms to solve a number of problems in computer arithmetic, image processing, and computer vision.
R. Lin, S. Olariu, J.L. Schwing, J. Zhang   +3 more
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Reconfigurable Computing Hypervisors

Increasing complexity in automation and autonomy features in aircraft, particularly with the introduction of Machine Learning (ML) based approaches is leading to a growing interest in highly parallel processing architectures, Graphical Processing Units (GPUs). However, GPUs come with challenges, such as certification, weight and thermal design. Another
Janson, Vincent, Nöldeke, Phillip, Kleine, Samuel, Durak, Umut   +3 more
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Reconfiguration Cost for Reconfigurable Computing Architectures

2022 23rd ACIS International Summer Virtual Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing (SNPD-Summer), 2022
Shigeyuki Takano, Hideharu Amano
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