Results 1 to 10 of about 39,465 (208)
Applied and Computational Engineering, 2023 Rapid advances in artificial intelligence (AI) and machine learning have had a significant impact on various fields, including electronic design automation (EDA). This study aims to compare current EDA routing algorithms with AI-based routing algorithms, highlighting their respective advantages and limitations.
Zheyi Shen
openalex +2 more sources
Online self-repair of FIR filters [PDF]
, 2003 Chip-level failure detection has been a target of research for some time, but today's very deep-submicron technology is forcing such research to move beyond detection.
Benso, Alfredo +3 more
core +1 more source
On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis [PDF]
, 2005 Accelerating the synthesis of increasingly complex analog integrated circuits is key to bridge the widening gap between what we can integrate and what we can design while meeting ever-tightening time-to-market constraints.
Castro López, Rafael +2 more
core +1 more source
Industrial Fieldbus Improvements in Power Distribution and Conducted Noise Immunity With No Extra Costs [PDF]
, 2011 Industrial distributed control continues the move toward networks at all levels. At lower levels, control networks provide flexibility, reliability, and low cost, although perhaps the simplest but most important advantage is the reduced volume of ...
Barbancho Concejero, Antonio +3 more
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A layered fuzzy logic controller for nonholonomic car-like robot [PDF]
, 2006 A system for real time navigation of a nonholonomic car-like robot in a dynamic environment consists of two layers is described: a Sugeno-type fuzzy motion planner; and a modified proportional navigation based fuzzy controller.
El-Khatib, M.M., Hamilton, D.J.
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A High-level EDA Environment for the Automatic Insertion of HD-BIST Structures [PDF]
, 2000 This paper presents a High-Level EDA environment based on the Hierarchical Distributed BIST (HD-BIST), a flexible and reusable approach to solve BIST scheduling issues in System-on-Chip applications.
Benso, Alfredo +4 more
core +1 more source
Low Power Processor Architectures and Contemporary Techniques for Power Optimization – A Review [PDF]
, 2009 The technological evolution has increased the number of transistors for a given die area significantly and increased the switching speed from few MHz to GHz range.
Gujarathi, Hemal S +2 more
core +2 more sources
Photonics design tool for advanced CMOS nodes
, 2015 Recently, the authors have demonstrated large-scale integrated systems with several million transistors and hundreds of photonic elements. Yielding such large-scale integrated systems requires a design-for-manufacture rigour that is embodied in the 10 ...
Alloatti, Luca +4 more
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Automatic synthesis of analog layout : a survey [PDF]
, 1990 A review of recent research in the automatic synthesis of physical geometry for analog integrated circuits is presented. On introduction, an explanation of the difficulties involved in analog layout as opposed to digital layout is covered.
Rentmeesters, Mark J.
core
Statistical Power Supply Dynamic Noise Prediction in Hierarchical Power Grid and Package Networks [PDF]
, 2008 One of the most crucial high performance systems-on-chip design challenge is to front their power supply noise sufferance due to high frequencies, huge number of functional blocks and technology scaling down.
Casu +10 more
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