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Evolutional of the SAR ADC Slides
2018AbstractSuccessive approximation Analog to Digital Converters (SAR ADCs) have become one of the dominant types of ADC. SAR ADCs are extremely efficient when working at moderate sampling speeds and at moderate resolutions. Through interleaving, SAR ADCs can operate at very high sampling rates.
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A 40-Nm CMOS 12b 120-MS/s Nonbinary SAR-Assisted SAR ADC With Double Clock-Rate Coarse Decision
IEEE Transactions on Circuits and Systems II: Express Briefs, 2020Yi-Ju Roh, Seung-Tak Ryu, Dong-Jin Chang
exaly
A Predictive SAR ADC Architecture
IEEE Transactions on Circuits and Systems I: Regular PapersMatias Jara, Behzad Razavi
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Introduction of Noise-Shaping SAR ADCs
2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2022openaire +1 more source
A 1 GS/s 10b 18.9 mW Time-Interleaved SAR ADC With Background Timing Skew Calibration
IEEE Journal of Solid-State Circuits, 2014Anantha Chandrakasan
exaly
A 12 Bit 100 MS/s SAR-Assisted Digital-Slope ADC
IEEE Journal of Solid-State Circuits, 2016Chun-Cheng Liu, Mu-Chen Huang
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A 1.7 mW 11b 250 MS/s 2-Times Interleaved Fully Dynamic Pipelined SAR ADC in 40 nm Digital CMOS
IEEE Journal of Solid-State Circuits, 2012Jan Craninckx, Bob Verbruggen
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