Results 61 to 70 of about 582,151 (290)
A True 1V 1µW Biomedical Front End with Reconfigurable ADC for Self powered Smarter IoT Healthcare Systems [PDF]
, 2015 This work proposes an ultralow power highly linear analog front-end (AFE) with an input dynamic range from 200μVpp to 20mVpp. The system consists of a signal conditioning instrumentation amplifier (IA), two programmable gain amplifiers (PGA), a mixed ...
Dutta, Asudeb +3 more
core +2 more sources
A low-power reconfigurable ADC for biomedical sensor interfaces [PDF]
, 2009 This paper presents a 12-bit low-voltage low-power reconfigurable Analog-to-Digital Converter (ADC). The design employs Switched Capacitor (SC) techniques and implements a Successive Approximation (SA) algorithm.
Delgado Restituto, Manuel +3 more
core +1 more source
Cryogenic Comparator Characterization and Modeling for a Cryo-CMOS 7b 1-GSa/s SAR ADC
European Solid-State Circuits Conference, 2022 This paper reports the experimental characterization and modelling of a stand-alone StrongARM comparator at both room temperature (RT) and cryogenic temperature (4.2 K).
Gerd Kiene +4 more
semanticscholar +1 more source
A Biomedical Sensor System With Stochastic A/D Conversion and Error Correction by Machine Learning
IEEE Access, 2019 This paper presents a high-precision biomedical sensor system with a novel analog-frontend (AFE) IC and error correction by machine learning. The AFE IC embeds an analog-to-digital converter (ADC) architecture called successive stochastic approximation ...
Yusaku Hirai +6 more
doaj +1 more source
Investigasi terhadap Kemampuan 2 Tipe ADC [PDF]
, 2009 Telah dibuat simulasi dan rangkaian untuk ADC (Analog to Digital Converter) tipe Flash dan SAR (Successive Approximation Register) 3 Bit. Simulasi dijalankan dengan memakai program Multisim dan Livewire.
Adnan, Y. (Yulinar) +1 more
core
Blind SAR ADC capacitor mismatch calibration [PDF]
2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017 This paper presents an all-digital background blind calibration technique for the capacitor mismatch problem in SAR ADCs. It utilizes the redundancy offered using a sub-radix-2 DAC architecture to blindly estimate the mismatch and the assigned weight for each comparator decision.
Armia Salib +2 more
openaire +1 more source
SensorsThis paper presents a 14-bit hybrid column-parallel compact analog-to-digital converter (ADC) for the application of digital infrared focal plane arrays (IRFPAs) with compromised power and speed performance.
Douming Hu +7 more
doaj +1 more source
A 10 bit very low-power CMOS SAR-ADC for capacitive micro-mechanical pressure measurement in implants [PDF]
Advances in Radio Science, 2006 This paper presents the development of a 10 bit very low-power CMOS SAR-ADC to be used in medical implants. The first part discusses the principle schematic and the requirements for component matching and the comparator of the ADC.
B. Bechen +3 more
doaj
A 1-kS/s 12-bit SAR ADC With Burst Conversion for Anti-Leakage Current
IEEE AccessA 1-kS/s 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) which performs burst conversion is proposed to reduce the loss of the sampled analog signal due to leakage current in the capacitors of the capacitor-based digital ...
Haewoon Son +2 more
doaj +1 more source
IEEE Access, 2020 This paper proposes a 16-bit 6-channel high-voltage successive approximation register (SAR) ADC with an optimized 5 + 5 + 6 segmented capacitor array.
Yuanjun Cen +12 more
doaj +1 more source