Silicon-on-insulator nanophotonics [PDF]
Nanophotonics promise a dramatic scale reduction compared to contemporary photonic components. This allows the integration of many functions onto a chip. Silicon-on-insulator (SOI) is an ideal material for nanophotonics. It consists of a thin layer of silicon on top of an oxide buffer.
Stephan Beckx+9 more
openaire +2 more sources
Pattern Formation on Silicon-on-Insulator [PDF]
ABSTRACTThe strain driven self-assembly of faceted Ge nanocrystals during epitaxy on Si(001) to form quantum dots (QDs) is by now well known. We have also recently provided an understanding of the thermodynamic driving force for directed assembly of QDs on bulk Si (extendable to other QD systems) based on local chemical potential and curvature of the ...
Feng Liu+8 more
openaire +2 more sources
Giant, Anomalous Piezoimpedance in Silicon-on-insulator [PDF]
14 pages with 10 figures including ...
Li, H.+5 more
openaire +6 more sources
A compact silicon-on-insulator polarization splitter [PDF]
A compact directional coupler-based polarization splitter is designed and realized using silicon-on-insulator (SOI) waveguides. Even though silicon does not have any material birefringence, the high index contrast obtained in the SOI platform and reduced waveguide dimensions makes it possible to induce significant birefringence.
Kiyat I., Aydinli, A., Dagli, N.
openaire +6 more sources
Silicon on insulator MESFETs for RF amplifiers [PDF]
CMOS compatible, high voltage SOI MESFETs have been fabricated using a standard 3.3V CMOS process without any changes to the process flow. A 0.6μm gate length device operates with a cut-off frequency of 7.3GHz and a maximum oscillation frequency of 21GHz.
Seth J. Wilk+4 more
openaire +3 more sources
Silicon-on-insulator ‘HRes’ circuit
Retinal circuits in bulk CMOS are complicated by the need to compensate for the back-gate effect. However, partially depleted silicon-on-insulator devices have a greatly reduced back-gate effect compared to bulk CMOS. Silicon retinae implemented using SOI technology would therefore be smaller and simpler than the bulk CMOS equivalent.
R.J.T. Bunyan, G.F. Marshall, S. Collins
openaire +2 more sources
Lateral Tunnel Epitaxy of GaAs in Lithographically Defined Cavities on 220 nm Silicon-on-Insulator. [PDF]
Yan Z+7 more
europepmc +1 more source
Fiber-to-Chip Three-Dimensional Silicon-on-Insulator Edge Couplers with High Efficiency and Tolerance. [PDF]
Li X, Yu S, Gui C.
europepmc +1 more source
Investigation of Limitations in the Detection of Antibody + Antigen Complexes Using the Silicon-on-Insulator Field-Effect Transistor Biosensor. [PDF]
Generalov V+5 more
europepmc +1 more source
"Silicon-On-Insulator"-Based Biosensor for the Detection of MicroRNA Markers of Ovarian Cancer. [PDF]
Ivanov YD+18 more
europepmc +1 more source