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FPGA architecture based on OpenCL for studying the acoustic backscattering by an immersed tube. [PDF]
Hadji M +3 more
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Cache-efficient and vectorized parallel dynamic programming for RNA folding. [PDF]
Gruzewski M, Palkowski M.
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Accelerating whole-genome alignment in the age of complete genome assemblies
Chandra G +3 more
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SIMD, Single Instruction Multiple Data
2004The single instruction, multiple data (SIMD) mode is the simplest method of parallelism and now becoming the most common. In most cases this SIMD mode means the same as vectorization. Ten years ago, ve ctor computers were expensive but reasonably simple to program.
Wesley Petersen, Peter Arbenz
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A high performance FFT library with single instruction multiple data (SIMD) architecture
2011 International Conference on Electronics, Communications and Control (ICECC), 2011Fast Fourier Transform (FFT) is the basis of Digital Signal Processing (DSP). In this paper, a high performance FFT library using radix-2 decimation in frequency (DIF) algorithm is presented which is well suited for SIMD architecture. SIMD architecture microprocessors, such as Intel and AMD, allow parallel floating point operations on contiguous data ...
Wang Xu, Zhang Yan, Ding Shunying
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A radix-2 FFT algorithm for Modern Single Instruction Multiple Data (SIMD) architectures
IEEE International Conference on Acoustics Speech and Signal Processing, 2002Modern Single Instruction Multiple Data (SIMD) microprocessor architectures allow parallel floating point operations over four contiguous elements in memory. The radix-2 FFT algorithm is well suited for modern SIMD architectures after the second stage (decimation-in-time case).
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IEEE Journal of Solid-State Circuits, 2002
A high-performance and low-power 32-bit multiply-accumulate unit (MAC) is described in this paper. The last mixed-length encoding scheme used in the MAC leverages the advantage of a 16-bit encoding scheme without adding extra delay to the faster four-stage Wallace tree of a 12-bit encoding scheme. With this new encoding scheme, one-cycle throughput for
Yuyun Liao, David B. Roberts
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A high-performance and low-power 32-bit multiply-accumulate unit (MAC) is described in this paper. The last mixed-length encoding scheme used in the MAC leverages the advantage of a 16-bit encoding scheme without adding extra delay to the faster four-stage Wallace tree of a 12-bit encoding scheme. With this new encoding scheme, one-cycle throughput for
Yuyun Liao, David B. Roberts
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In order to cope with the massive scale of traffic and reduce the memory overhead of traffic statistics, the traffic statistics method based on the Sketch algorithm has become a research hotspot for traffic statistics.
Lingling Tan, Yongyue Wang, Junkai Yi
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SIMD (Single Instruction, Multiple Data) Machines
2011Jack Dongarra +58 more
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