Results 41 to 50 of about 629,893 (215)
IET Electric Power Applications, Volume 20, Issue 1, January/December 2026.Geometric parameters of the segmented‐stator SS‐SRM/SS‐HRM topology. This figure shows the geometric notation used for the stator, rotor, shaft, winding regions and magnet‐related variables that will be optimised. ABSTRACT This paper presents a fully automated finite‐element‐based multi‐objective optimisation workflow for segmented‐stator switched ...
Joel Bravo Castro +2 more
wiley +1 more source
IEEE Open Journal of the Industrial Electronics SocietyThe dc solid-state circuit breaker (SSCB) is commonly used to protect sensitive equipment and enhance system stability by quickly interrupting fault currents, thereby increasing overall safety.
Phanit Sok +3 more
doaj +1 more source
IET Electrical Systems in Transportation, Volume 2026, Issue 1, 2026.Direct current (DC)–DC converters are the backbone of electric vehicle (EV) power trains, enabling efficient and bidirectional energy flow between the battery, high‐voltage (HV) DC link, and auxiliary rails under tight isolation, gain, ripple, and electromagnetic interference (EMI) constraints.
Abhilash Sakhare +3 more
wiley +1 more source
Reduced Snubber Circuit Elements For Pwm Voltage Source Inverter [PDF]
, 2002 This paper presents the description and simulation of a new proposed arrangement of RLD/RCD snubber circuit used with pulse width modulated voltage source inverter. The new arrangement allows minimizing the number of active elements of RCD with 50%. This
Ameen, Yasir M. Y., Saied, Basil M.
core +2 more sources
Multi‐Layer MTDC Protection: Design and Simulation Assessment
IET Generation, Transmission &Distribution, Volume 20, Issue 1, January/December 2026.This study proposes a novel multi‐layer protection architecture for multi‐terminal DC systems that separates fault current‐limiting and interruption functions. By combining a thyristor‐based fault current limiter with an active resonance circuit breaker, the scheme significantly reduces peak fault currents and di/dt stress, enabling a more compact ...
Jong‐Geon Lee +3 more
wiley +1 more source
Computer aided design of snubber circuit for DC/DC converter with SiC power MOSFET devices [PDF]
, 2015 In this paper a computer aided design of snubber circuit for DC\DC converter is presented. Due to the presence of parasitic LC circuit in the power stage (inductance and capacitance), it is necessary to use an additional snubber circuit for voltage ...
Tarczewski, T. +3 more
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IEEE AccessAn analytical method is presented for designing damping resistance to minimize surge voltage in a flyback converter with a dissipative snubber. It is based on given snubber capacitance and resistance.
Sunggyu Jin, Jongwon Choi
doaj +1 more source
A novel inductively coupled RLC damping scheme for eliminating switching oscillations of SiC MOSFET
IET Power Electronics, 2023 Severe switching oscillations of SiC MOSFET seriously affect its efficient and reliable application. Herein, a novel inductively coupled RLC damping scheme is proposed to eliminate switching oscillations.
JiaWen Li +4 more
doaj +1 more source
IET Power Electronics, Volume 19, Issue 1, January/December 2026.The article discusses the novel topology with high gain and low voltage stress DC‐DC converter based on switched‐capacitor and switched‐inductors for fuel cell and PV applications. The converter performance is analyzed and verified with the hardware prototype (22/400V, 50kHz).
Md Samiullah +4 more
wiley +1 more source
IET Power Electronics, Volume 19, Issue 1, January/December 2026.This article presents a Fifteen‐level inverter topology that has a lesser number of switches (12) and can accommodate isolated DC sources. The total harmonic elimination (THD) of the proposed topology using genetic algorithm is within the IEEE 519 standards. Further, the fifteen‐level inverter is implemented in Hardware and firing pulses were generated
Yogesh Joshi +4 more
wiley +1 more source