Results 21 to 30 of about 79,892 (211)
High-throughput state-machine replication using software transactional memory. [PDF]
Zhao W +7 more
europepmc +2 more sources
Analyzing Software Transactional Memory Applications by Tracing Transactions
La Mémoire Transactionnelle (MT) est un nouveau paradigme de programmation concurrente qui vise à être une alternative aux mécanismes traditionnels de synchronisation basés sur des verrous. C'est une approche de plus haut niveau qui permet de simplifier le développement des applications concurrentes sur des architectures multicoeurs. Toutefois, ce haut
Márcio Castro +5 more
openalex +3 more sources
An autonomic‐computing approach on mapping threads to multi‐cores for software transactional memory
Naweiluo Zhou +4 more
openalex +3 more sources
Modularising Verification Of Durable Opacity [PDF]
Non-volatile memory (NVM), also known as persistent memory, is an emerging paradigm for memory that preserves its contents even after power loss. NVM is widely expected to become ubiquitous, and hardware architectures are already providing support for ...
Eleni Bila +5 more
doaj +1 more source
Adaptive Versioning in Transactional Memory Systems
Transactional memory has been receiving much attention from both academia and industry. In transactional memory, program code is split into transactions, blocks of code that appear to execute atomically.
Pavan Poudel, Gokarna Sharma
doaj +1 more source
Scalable Distributed Metadata Server Based on Nonblocking Transactions [PDF]
Metadata performance scalability is critically important in high-performance computing when accessing many small files from millions of clients. This paper proposes a design of a scalable distributed metadata server, PPMDS, for parallel file systems ...
Kohei Hiraga +2 more
doaj +3 more sources
Software transactional memory (STM) provides synchronization support to ensure atomicity and isolation when threads access shared data in concurrent applications.
Alessandro Pellegrini +3 more
semanticscholar +1 more source
Hardware acceleration of number theoretic transform for zk‐SNARK
An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao +6 more
wiley +1 more source
A simulation of distributed STM [PDF]
This paper presents an extension of the IaaS Cloud simulator CloudSim. Computational tasks are modeled in the form of a transaction on a transactional memory and communication between the data center is based on the Two-Phase Commit protocol ...
Brkin Dragan +2 more
doaj +1 more source
Design and implementation of a cloud server based on hardware virtualization
Traditional cloud computing is developed from a high-performance cluster. Every server in the high-performance cluster has its own resources, including a CPU, memory, a network, I/O (Input/Output), a power system, and a heat dissipation system.
Chen-ming ZHENG +5 more
doaj +1 more source

