Results 111 to 120 of about 7,510 (291)
3D‐Printed Magnetoelectronics for Interactive Appliances and Self‐Aware 4D‐Printed Mechatronics
3D‐printed magnetoelectronics integrate high‐performance magnetic field sensing directly into complex structural components. Flexible spring and cross‐shaped sensors exhibit giant magnetoimpedance and 3D Hall sensing for vector field reconstruction. Applications include smart‐home switches, robotic joysticks, volumetric magnetometers, and self‐aware 4D‐
Eduardo Sergio Oliveros‐Mata +5 more
wiley +1 more source
Approximating the Impedance Profile of Multilayer Reference Plane Cut-Out Compensation up to Ka-Band
This paper addresses and solves a problem finding the reference plane impedance compensation impedance profile using a modified logistic function approximation and avoiding both the search for complex fringe capacitance equations, when the reference ...
Vaidotas Barzdenas +2 more
doaj +1 more source
Stack And Queue Layouts Of Posets
. The stacknumber (queuenumber) of a poset is defined as the stacknumber (queuenumber) of its Hasse diagram viewed as a directed acyclic graph. Upper bounds on the queuenumber of a poset are derived in terms of its jumpnumber, its length, its width, and ...
Lenwood S. Heath +2 more
core
Junction Physics and Architectural Paradigms in Optoelectronic Semiconductor Fibers
Optoelectronic fibers are emerging as a key platform for distributed sensing, energy harvesting, and optical communication in deformable systems. Their performance is fundamentally governed by junction formation under confined, dynamic processing conditions.
Hailiang Wang +4 more
wiley +1 more source
Pbaeg: combine-vulnerabilities AEG to defeat protection mechanisms
Automatic exploit generation (AEG) refers to the process of automatically finding the path in the program that can trigger vulnerabilities and generate exploits.
Yu Wang, Zhoujun Li, Yipeng Zhang
doaj +1 more source
Eliminating the call stack to save RAM [PDF]
manuscriptMost programming languages support a call stack in the programming model and also in the runtime system.We show that for applications targeting low-power embedded microcontrollers (MCUs), RAM usage can be significantly decreased by partially or
Regehr, John +1 more
core
Design of an On-Chip Balun With a Minimum Amplitude Imbalance Using a Symmetric Stack Layout
This study develops a compact balun layout to minimize amplitude imbalance. Three baluns with different metal layers are fabricated using 0.13-mu m CMOS technology and their imbalance performance evaluated.
Lai, S.H. +4 more
core +1 more source
A multilayer stretchable organic light‐emitting diode (SOLED) patch enables conformal, high‐fill‐factor phototherapeutic illumination through vertically decoupled electrodes and robust encapsulation. The textile‐based SOLED platform delivers stable skin‐contact red light for wearable phototherapy and 5‐aminolevulinic acid (ALA)‐mediated photodynamic ...
Young Hyun Son +5 more
wiley +1 more source
A Review of Failure Modes and Safety Strategies of Lithium‐Ion Batteries from Materials to Systems
A cascade‐aware framework is presented for lithium‐ion battery safety, linking thermal runaway initiation, acceleration, runaway reaction, and propagation with material‐, cell/pack‐, and system‐level interventions. By integrating failure mechanisms, quantitative safety indicators, and staged interception strategies, this review highlights how safer ...
Jin Hyeok Yang +8 more
wiley +1 more source
A Novel Layout-Circuit Co-Design Framework for Radiation Hardening in Nanoscale Technology [PDF]
Electronic components in space are vulnerable to radiation-induced Single-Event Effects (SEEs). This work proposes a mitigation methodology combining layout- and circuit-level analysis with targeted hardening.
Vacca, Eleonora +3 more
core +1 more source

