Results 261 to 270 of about 109,368 (283)
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Analysis and modeling of layout scaling in silicon integrated stacked transformers
IEEE Transactions on Microwave Theory and Techniques, 2006The analysis and modeling of monolithic stacked transformers fabricated in a high-speed silicon bipolar technology is addressed. On-wafer experimental measurements are employed to investigate the effect of layout scaling on transformer performance parameters (i.e., self-resonance frequency, magnetic coupling coefficient, and insertion loss).
T. BIONDI +3 more
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A support-design tool for block-stacking storage system layout
2017In warehousing system, block stacking is one of the most common storage mode to guarantee high storage density in case of large quantities and limited product variety. Most common applications for block stacking storage are end-of-line warehouses at manufacturing facilities in processing industry (e.g., beverage, bakery, tissue industries).
Accorsi, R. +4 more
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Layout Based Full Chip Thermal Simulations of Stacked 3D Integrated Circuits
Electronic and Photonic Packaging, Electrical Systems and Photonic Design, and Nanotechnology, 2003This paper presents full-chip scale detailed thermal simulations of three-dimensional (3D) integrated circuit (IC) stacks. The inter-layer dielectric (ILD) and inter-metal dielectric (IMD) materials inside 3D IC stacks may cause extensive localized heating. The influence of multiple layers of dielectrics on heat trapping inside the 3D stack is analyzed.
Ashok Raman, Marek Turowski, Monte Mar
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Thermal Layout Optimization of Stacked Chip Based on Ant Colony Algorithm
Advanced Materials Research, 2012In this paper, an ant colony algorithm based on mutual information similarity is proposed to solve the stacked chips on the thermal layout optimization. In order to express the mutual information entropy between the optimal path and walking path, a new similarity impact factor is added in the algorithm operators of ant colony algorithm which increases ...
Jiang Guo Jiang +3 more
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Thermal layout optimization for 3D stacked multichip modules
Microelectronics Journal, 2023Yanning Chen +4 more
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3D Perception Framework for Stacked Container Layout in the Physical Internet
2018The Physical Internet concept was developed to address the current unsustainability problem of logistic systems. The key elements are the encapsulation and the handling of world-standard smart green modular containers (π-containers) throughout an open global logistic infrastructure.
Dong-Seong Kim, Hoa Tran-Dang
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An Analytical GPU-Enabled Framework for the Stacked 3D IC Layouts
Journal of Circuits, Systems and ComputersThree-dimensional integrated circuits (3D ICs) have recently garnered significant attention as a potential solution to the challenges posed by interconnect scaling in 2D ICs. However, the inclusion of an extra dimension and the introduction of through-silicon vias (TSVs) for interlayer connections have resulted in a significantly more complex compared
Xin Cheng +3 more
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Diversification of Stack Layout in Binary Programs Using Dynamic Binary Translation
2012Despite protracted efforts by researchers and practitioners, security vulnerabilities remain in modern software. Artificial diversity is an effective defense against many types of attack, and one form, address-space randomization, has been widely applied.
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Optimal stack layout in a sea container terminal with automated lifting vehicles
International Journal of Production Research, 2017Akash Gupta, Debjit Roy
exaly
Analysis and optimization of module layout for multi-stack vanadium flow battery module
Journal of Power Sources, 2019Hui Chen, Shaoliang Wang, Ao Tang
exaly