Results 241 to 248 of about 6,766 (248)

Design of an On-Chip Balun With a Minimum Amplitude Imbalance Using a Symmetric Stack Layout

IEEE Transactions on Microwave Theory and Techniques, 2010
exaly  

3D Layout of Spidergon, Flattened Butterfly and Dragonfly on a Chip Stack with Inductive Coupling Through Chip Interface

2017
Hideharu Amano, Michihiro Koibuchi, Ryota Yasudo   +2 more
exaly  

Standard Cell Layout Synthesis for Dual-Sided 3D-Stacked Transistors

2026 31st Asia and South Pacific Design Automation Conference (ASP-DAC)
Kairong Guo, Haoran Lu, Rui Guo, Jiarui Wang, Chunyuan Zhao, Heng Wu 0007, Runsheng Wang, Yibo Lin   +7 more
openaire   +1 more source

On the Stack Number and the Queue Number of the Bubble-Sort Graph

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2016
exaly  

Model-Based Function Call Code Generation and Stack Management in Retargetable Compilers: Application Binary Interface Modeling of Stack Layout and Function Call Sequence

2015
exaly  

Hybrid Stack Space Layout Randomization for Software Mtd

Xiaojian Liu, Yangyang Zhang, Wen GU, Yifan Wang, Ruotong Zhang   +4 more
openaire   +1 more source

WITHDRAWN: Dimensions–Layout–Stacking Methods for Cold Storage

2015
openaire   +1 more source

Heap and stack layout for multithreaded processes in a processing system

2008
WILDING MARK FRANCIS, WOOD DANIEL ALAN
openaire   +1 more source