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Fault simulation with test switching for static test compaction
2014 IEEE 32nd VLSI Test Symposium (VTS), 2014Static test compaction procedures reduce the number of tests in a given test set without reducing the fault coverage. Static test compaction procedures can use the set or the number of faults detected by each test as guidance. Fault simulation without or with limited fault dropping is needed for producing this information.
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A method of static compaction of test stimuli
Proceedings 10th Asian Test Symposium, 2002Large numbers of test stimuli impact on test application time and cost of test application. Hence there is the need to keep numbers of test stimuli low while maintaining as high fault coverage as possible. In this paper, static compaction of test stimuli is seen as a minimization problem.
Kwame Osei Boateng +2 more
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Static and Quasi-Static Test Procedures of Piston Engines
SAE Technical Paper Series, 2002<div class="htmlview paragraph">This work compares procedures specified on standard ISO-1585 applicable to piston engine bench dynamometer, with two quasi-static procedures. The first one is based on maintain constant the engine rotation and the load during 1 minute and then modified the work conditions. This procedure results in a step test when
José Eduardo Mautone Barros +2 more
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Allegations as aids to static program testing
Proceedings of the annual conference on - ACM 76, 1976In static program analysis, a program is examined without execution in an attempt to anticipate possible sources of error. Possible errors detected in this way can rarely be considered certain to occur because of the impossibility of infallibly determining the executability of a given program path.
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International Test Conference 1988 Proceeding@m_New Frontiers in Testing, 2003
The basics are presented of a test methodology used for dual-port static RAMs (random-access memories). The fundamental problem in testing dual-port static RAMs is how to address the entire array from both sides individually. Any memory tester with dual pattern generators and dual timing systems would suffice, but most existing memory testers were ...
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The basics are presented of a test methodology used for dual-port static RAMs (random-access memories). The fundamental problem in testing dual-port static RAMs is how to address the entire array from both sides individually. Any memory tester with dual pattern generators and dual timing systems would suffice, but most existing memory testers were ...
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A Cluster Analysis of Static Strength Tests
Research Quarterly. American Association for Health, Physical Education and Recreation, 1968Abstract Ages, heights, weights, and 24 static (cable tensiometer) strength test scores were obtained from 81 college men enrolled in service course classes at the University of Oregon during the 1963–64 academic year. Of the 276 intercorrelations between strength scores, 215 were significant (p > .01; r ≥ .285).
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Survey of Approaches for Postprocessing of Static Analysis Alarms
ACM Computing Surveys, 2023Alexander Serebrenik, Tukaram Muske
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Dynamic Tensile Behaviour and Crack Propagation of Coal Under Coupled Static-Dynamic Loading
International Journal of Mining Science and Technology, 2020Xianjie Hao, Shaohua Wang, Yixin Zhao
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