Results 111 to 120 of about 5,135 (265)
Exfoliated‐MoS2 Gradual Resistive Switching Devices as Artificial Synapses
A vertical memristor based on untreated, exfoliated MoS2 is presented, revealing gradual resistive switching governed by Schottky barrier modulation at the MoS2/metal interface from the trapping/detrapping of charges. Furthermore, the device emulates synaptic‐like plasticity functions, including: potentiation, depression, and spike‐amplitude‐dependent ...
Deianira Fejzaj +3 more
wiley +1 more source
Monolithic Co‐Integration of Vertical FET and Memristor for 1T1R Cell
This work demonstrates a vertically integrated one‐transistor–one‐memristor (1T1R) cell by stacking a MoS2 vertical field‐effect transistor (VFET) with a mortise–tenon‐shaped (MTS) memristor. This compact architecture not only exhibits highly uniform resistive switching characteristics but also provides a strategy for constructing densely packed ...
Fubo Jiao +15 more
wiley +1 more source
In this paper, we explore the applications of fractional stochastic volatility (FSV) models within the realm of market microstructure theory and optimal execution strategies. FSV models extend traditional stochastic volatility frameworks by incorporating
Abe Webb
doaj +1 more source
I denne avhandlingen ble effektiviteten av Stokastiske Volatilitetsmodeller, med ARMA(p, q) log-volatilitet, undersøkt i forhold til GARCH(p, q) i å forutsi volatiliteten til finansielle tidsserier. Videre var målet å vurdere evnen til SVMer i å fange opp atferden til underliggende finansielle tidsserier.
openaire +1 more source
Robust and Compatible Ferroelectric Memories with Polycrystalline TiO2 Channel for 3D Integration
Robust and monolithic 3D compatible ferroelectric memories are realized using the polycrystalline TiO2 channel‐based FeFET. The review covers physical mechanisms of the TiO2 channel FeFET, quantitative benchmarking, and advanced planar/vertical architectures for monolithic 3D integration based on HfO2‐TiO2 gate stack, offering a roadmap for reliable ...
Xujin Song +10 more
wiley +1 more source
Model‐Based Time‐Modulated Write Algorithm for 1R Analog Memristive Crossbar Arrays
A novel model‐based time‐modulated write algorithm efficiently programs analog 1R memristive crossbar arrays by varying pulse duration at a fixed voltage. By leveraging a physics‐based compact model and a dynamic gain mechanism, this approach overcomes device nonlinearities and parasitic effects.
Richard Schroedter +7 more
wiley +1 more source
Through the introduction of a niobium oxide layer into a hafnia ferroelectric capacitor stack, we build a memory device with a strong imprint effect. This imprint leads to a millisecond retention loss that can be tuned by the programming conditions that can be utilized as a scalable, analog hardware time constant for bio‐inspired temporal computing ...
Luca Fehlings +3 more
wiley +1 more source
Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho +6 more
wiley +1 more source
Behavioral portfolio decisions in a GARCH world
This paper pioneers behavioral portfolio decisions as per prospect theory under a stochastic volatility setting that is exemplified by the use of an affine GARCH model.
Nando Ehler +3 more
doaj +1 more source
Resistive memory devices are explored for operation at extremely low temperatures relevant to quantum computing. The study reveals how transistor behavior strongly influences memory performance under cryogenic conditions and introduces an optimized programming strategy.
Emilio Pérez‐Bosch Quesada +11 more
wiley +1 more source

