Results 1 to 10 of about 303,436 (267)
System on Chip (SoC) for Invisible Electrocardiography (ECG) Biometrics. [PDF]
Sensors (Basel), 2022 de Melo F, Neto HC, da Silva HP.
europepmc +2 more sources
Deep Neural Networks-Based Weight Approximation and Computation Reuse for 2-D Image Classification
IEEE Access, 2022 Deep Neural Networks (DNNs) are computationally and memory intensive, which present a big challenge for hardware, especially for resource-constrained devices such as Internet-of-Things (IoT) nodes.
Mohammed F. Tolba +4 more
doaj +1 more source
Nanoscale Research Letters, 2022 The adverse effect of ultraviolet (UV) radiation on human beings has sparked intense interest in the development of new sensors to effectively monitor UV and solar exposure.
Ahmed Abusultan +5 more
doaj +1 more source
DS2B: Dynamic and Secure Substitution Box for Efficient Speech Encryption Engine
IEEE Access, 2021 This paper proposes an efficient encryption technique based on Dynamic and Secure Substitution Box (DS2B) design suitable for IoT and resource-constrained platforms. The DS2B has the advantages of simple structure and good encryption performance.
Mohammed F. Tolba +4 more
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Synthesis of networks on chips for 3D systems on chips [PDF]
2009 Asia and South Pacific Design Automation Conference, 2009 Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (NoCs) are necessary to efficiently handle the 3D interconnect complexity.
Srinivasan Murali +3 more
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C3PU: Cross-Coupling Capacitor Processing Unit Using Analog-Mixed Signal for AI Inference
IEEE Access, 2021 This paper presents a novel cross-coupling capacitor processing unit (C3PU) that supports analog-mixed signal in-memory computing to perform multiply-and-accumulate (MAC) operations.
Dima Kilani +4 more
doaj +1 more source
On-chip communication architectures for reconfigurable System-on-Chip [PDF]
Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798), 2004 On-chip communication architectures can have a great influence on the speed and area of System-on-Chip designs, and this influence is expected to be even more pronounced on reconfigurable System-on-Chip (rSoC) designs. To date, little research has been conducted on the performance implications of different on-chip communication architectures for rSoC ...
Andy Lee, Neil W. Bergmann
openaire +2 more sources
Gradient Estimation for Ultra Low Precision POT and Additive POT Quantization
IEEE Access, 2023 Deep learning networks achieve high accuracy for many classification tasks in computer vision and natural language processing. As these models are usually over-parameterized, the computations and memory required are unsuitable for power-constrained ...
Huruy Tesfai +4 more
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RRAM-based CAM combined with time-domain circuits for hyperdimensional computing
Scientific Reports, 2021 Content addressable memory (CAM) for search and match operations demands high speed and low power for near real-time decision-making across many critical domains. Resistive RAM (RRAM)-based in-memory computing has high potential in realizing an efficient
Yasmin Halawani +5 more
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Hyper-Dimensional Computing Challenges and Opportunities for AI Applications
IEEE Access, 2022 Brain-inspired architectures are gaining increased attention, especially for edge devices to perform cognitive tasks utilizing its limited energy budget and computing resources.
Eman Hassan +3 more
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