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All-digital successive approximation TDC in time-mode signal processing

Microelectronics Journal, 2021
An 8-bit time-mode successive approximation register time-to-digital converter (SAR TDC) is proposed. The TDC achieves a high resolution and a better power/area efficiency by using a pre-skewed delay line with digital time interpolation.
Fei Yuan, Yushi Zhou, Daniel Junehee Lee   +2 more
exaly   +2 more sources

TDC: An MLP-based Sustainable DL Model for Oak Wilt Disease Classification

2023 Second International Conference on Augmented Intelligence and Sustainable Systems (ICAISS), 2023
Trees conservation and protection have been an active and significant domain of research and concern for the betterment of the globe. Tree diseases and infection remain an area to explore by various researchers, therefore an efficient and sustainable ...
Ankit Bansal, Rishabh Sharma, Vinay Kukreja, Ashutosh Kumar Singh, Satvik Vats   +4 more
semanticscholar   +1 more source

A comprehensive review on tourism destination competitiveness (TDC) literature

Competitiveness Review: an international business journal, 2022
Purpose This study aims to provide current and organised insights into past published studies on tourism destination competitiveness (TDC) in the past decade through systematic literature analysis.
Nur Shahirah Mior Shariffuddin, M. Azinuddin, M. Hanafiah, Wan Mohd Adzim Wan Mohd Zain   +3 more
semanticscholar   +1 more source

A 10GS/s 8b 25fJ/c-s 2850um2 Two-Step Time-Domain ADC Using Delay-Tracking Pipelined-SAR TDC with 500fs Time Step in 14nm CMOS Technology

IEEE International Solid-State Circuits Conference, 2022
High-speed (>GS/s) medium-resolution ADCs are in high demand for wideband communication ICs. Meanwhile, the increasing cost in advanced technology nodes favors area-efficient ADC architectures. The traditional voltage-domain time-interleaved (TI) SAR ADC
Juzheng Liu, Mohsen Hassanpourghadi, M. Chen   +2 more
semanticscholar   +1 more source

A High Linearity TDC With a United-Reference Fractional Counter for LiDAR

IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 2022
A united-reference fractional counter (URFC) is proposed for multi-level time-to-digital converters (TDCs) used in direct time-of-flight (dToF) light detection and ranging (LiDAR) applications.
W. Zhang, Rui Ma, Xiayu Wang, Hao Zheng, Zhangming Zhu   +4 more
semanticscholar   +1 more source

An Efficient TDC Using a Dual-Mode Resource-Saving Method Evaluated in a 28-nm FPGA

IEEE Transactions on Instrumentation and Measurement, 2022
FPGA-based time-to-digital converters (TDCs) are required to be accurate, linear, and fast, while at the same time employing a reduced number of resources. Pushing these requirements to the limit is challenging, although it is constantly required by many
Mojtaba Parsakordasiabi, I. Vornicu, Á. Rodríguez-Vázquez, R. Carmona-Galán   +3 more
semanticscholar   +1 more source

A Novel Time-to-Amplitude Converter and a Low-Cost Wide Dynamic Range FPGA TDC for LiDAR Application

IEEE Transactions on Instrumentation and Measurement, 2022
This article demonstrates a low-cost wide dynamic range field-programmable gate array (FPGA) time-to-digital converter (TDC) and a time-to-amplitude converter (TAC) based on an embedded XOR gate of the FPGA and a low-complexity circuitry.
Azad Ozan Korkan, H. Yuksel
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SO2 Capture by Two Aluminum-Based MOFs: Rigid-like MIL-53(Al)-TDC versus Breathing MIL-53(Al)-BDC.

ACS Applied Materials and Interfaces, 2021
Metal-organic frameworks MIL-53(Al)-TDC and MIL-53(Al)-BDC were explored in the SO2 adsorption process. MIL-53(Al)-TDC was shown to behave as a rigid-like material upon SO2 adsorption.
Alfredo López‐Olvera, J. A. Zárate, Eva Martínez-Ahumada, Dong Fan, M. Díaz-Ramírez, Paola A. Saenz-Cavazos, V. Martis, Daryl R. Williams, Elí Sánchez-González, G. Maurin, Ilich A. Ibarra   +10 more
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A 4-GS/s 11.3-mW 7-bit Time-Based ADC With Folding Voltage-to-Time Converter and Pipelined TDC in 65-nm CMOS

IEEE Journal of Solid-State Circuits, 2021
A folding voltage-to-time converter (VTC) is proposed for low-power time-based (TB) flash ADCs performing voltage-to-time-to-digital conversion.
Il-Min Yi, Naoki Miura, H. Nosaka
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