Results 11 to 20 of about 3,951 (223)

Transconductance enhancement method for operational transconductance amplifiers

open access: yesElectronics Letters, 2010
An improved recycling structure for an operational transconductance amplifier is proposed. The proposed structure separates the AC path from the DC path, and achieves a significant boost in transconductance under the same power and area budget. A folded-cascode amplifier employing the improved recycling structure was implemented in SMIC standard 0.13 ...
X Tan, Y L Li
exaly   +2 more sources

Design and temperature assessment of analog/RF and linearity parameters on dual material gate junctionless FinFET at 7 nm technology node for nano scale applications [PDF]

open access: yesScientific Reports
The dual-material gate junctionless FinFET (DMG JLFinFET) has emerged as a promising device in semiconductor technology due to its enhanced capability to suppress short-channel effects (SCEs).
Rambabu Kusuma
doaj   +2 more sources

0.5 V Versatile Voltage- and Transconductance-Mode Analog Filter Using Differential Difference Transconductance Amplifier

open access: yesSensors, 2023
In this work, a new versatile voltage- and transconductance-mode analog filter is proposed. The filter, without requiring resistors, employs three differential-difference transconductance amplifiers (DDTAs) and two grounded capacitors, which is suitable ...
Daniel Arbet   +2 more
exaly   +3 more sources

An Ultra-Low-Voltage Transconductance Stable and Enhanced OTA for ECG Signal Processing

open access: yesMicromachines
In this paper, a rail-to-rail transconductance stable and enhanced ultra-low-voltage operational transconductance amplifier (OTA) is proposed for electrocardiogram (ECG) signal processing. The variation regularity of the bulk transconductance of pMOS and
Yue Yin, Ziting Feng, Qi Haobo
exaly   +3 more sources

Damage-Free Passivation of Ambipolar OECTs with Fluoropolymer Film for Enhanced Performance and Stability Toward Reliable Biosignal Processing. [PDF]

open access: yesAdv Sci (Weinh)
A damage‐free iCVD fluoropolymer passivation strategy is introduced for ambipolar vertical OECTs. Vapor‐phase infiltration and thermal annealing induce nanoscale phase separation in the OMIEC channel, enhancing overall device performance. A single‐channel bipolar event‐driven spiking encoder is also demonstrated for electrocardiogram signal encoding ...
Yang J   +7 more
europepmc   +2 more sources

Study of Electrical Performance of Hetero-Dielectric Gate Tunnel Field Effect Transistor (HDG TFET): A Novel Structure for Future Nanotechnology

open access: yesJournal of Engineering Technology and Applied Physics, 2022
Although, dynamic power in portable mobile devices can be reduced by reducing power supply VDDon the cost of increased leakage current. Therefore, maintaining low leakage current in the device is serious issue for minimizing overall ...
Tan Chun Fui   +2 more
doaj   +1 more source

Optimizing Performance of Coaxis Planar-Gated ZnO Nanowire Field-Emitter Arrays by Tuning Pixel Density

open access: yesNanomaterials, 2022
Gated ZnO nanowire field emitter arrays (FEAs) have important applications in large-area vacuum microelectronic devices such as flat panel X-ray sources and photodetectors.
Songyou Zhang   +4 more
doaj   +1 more source

Wafer-Scale 3D Integration for High-Density Multi-Valued Neuromorphic Logic. [PDF]

open access: yesAdv Sci (Weinh)
Wafer‐scale 3D vertically integrated multi‐valued logic (MVL) circuits are realized by monolithically integrating a Te/IGZO heterojunction FET with an engineered Te pull‐up FET. Heterointerface‐mediated transport and optimized current matching enable stable ternary operation, while vertical stacking reduces circuit footprint and interconnect complexity,
Kim CH   +5 more
europepmc   +2 more sources

Introduction of the structure, modeling and analysis of junctionless heterostructure Si/Si1-xGex transistor [PDF]

open access: yesمجله مدل سازی در مهندسی, 2023
In Junctionless transistors, the source-channel-drain doping is of the same type and level, hence, the process of making Junctionless transistors is easier than inverting mode transistor.
reyhaneh ejlali   +3 more
doaj   +1 more source

Design of Low Voltage Quasi-floating Self Cascode Current Mirror

open access: yesU.Porto Journal of Engineering, 2021
In this paper, a modified structure of self-cascode structure is proposed. In the proposed structure, the MOSFET working in saturation mode is replaced by a Quasi-floating gate MOSFET by which the threshold voltage can be scaled, resulting in an increase
P. Anil, S. Tamil, N. Raj
doaj   +1 more source

Home - About - Disclaimer - Privacy