Results 111 to 120 of about 37,772 (288)

Analysis and Verilog-A Modeling of Floating-Gate Transistors

IEEE Open Journal of Circuits and Systems
Floating-gate transistors provide non-volatile analog storage in standard CMOS processes and are crucial in the development of reconfigurable Systems on Chips (SoCs), programmable analog structures, analog neural networks, and mixed-signal neuromorphic ...
Sayma Nowshin Chowdhury, Matthew Chen, Sahil Shah   +2 more
doaj   +1 more source

A Verilog-A model of an undoped symmetric dual-gate MOSFET [PDF]

Advances in Radio Science, 2006
We describe a new procedure of solving the electrostatic potentials in the silicon film of an undoped DG SOI MOSFET structure. Starting from a model previously described in the literature by Malobabic et al.
O. Cobianu, O. Soffke, M. Glesner
doaj  

A 4H-SiC CMOS Oscillator-Based Temperature Sensor Operating from 298 K up to 573 K. [PDF]

Sensors (Basel), 2023
Rinaldi N, Liguori R, May A, Rossi C, Rommel M, Rubino A, Licciardo GD, Di Benedetto L.   +7 more
europepmc   +1 more source

A verilog RTL synthesis tool for heterogeneous FPGAs [PDF]

, 2005
Peter Jamieson, Jonathan Rose
openalex   +1 more source

A Comprehensive Analog–Mixed Signal (AMS) Simulations Environment

Chips
The analog–mixed signal simulation environment, used for verifying non-volatile memory macrocells, is presented. It has been adopted over the last decade, providing excellent results in verification coverage, efficiency, and flexibility. This methodology
Enrico Castaldo, Marco Eugenio Gibilaro
doaj   +1 more source

Modeling remote system for sensor monitoring using verilog HDL and simulink Co-simulation [PDF]

, 2005
K. Arshak, Essa Jafer, D. McDonagh
openalex   +1 more source

The Simulation Semantics of Synthesisable Verilog

Proceedings of the ACM on Programming Languages
Despite numerous previous formalisation projects targeting Verilog, the semantics of Verilog defined by the Verilog standard -- Verilog's simulation semantics -- has thus far eluded definitive mathematical formalisation. Previous projects on formalising the semantics have made good progress but no previous project provides a formalisation that can be ...
openaire   +2 more sources

Nicarus: A distributed verilog compiler [PDF]

, 2005
Jun Wang, C. Tropper
openalex   +1 more source

VHDL vs. Bluespec system verilog [PDF]

, 2008
Flavius Gruian, Mark Westmijze
openalex   +1 more source

Appendix D: Implementing State Machines using Verilog Behavioural Mode [PDF]

, 2008
Peter Minns, Ian Elliott
openalex   +1 more source