Results 1 to 10 of about 21,529 (302)
field-programmable gate array [PDF]
, 2000 In this chapter, we describe the design of a field programmable gate array (FPGA) board capable of acquiring the information coming from a fast digitization of the signals generated in a drift chambers. The digitized signals are analyzed using an ad hoc real‐time algorithm implemented in the FPGA in order to reduce the data throughput coming from the ...
Gianluigi Chiarello +6 more
core +7 more sources
Mixed-precision weights network for field-programmable gate array. [PDF]
PLoS ONE, 2021 In this study, we introduced a mixed-precision weights network (MPWN), which is a quantization neural network that jointly utilizes three different weight spaces: binary {-1,1}, ternary {-1,0,1}, and 32-bit floating-point.
Ninnart Fuengfusin, Hakaru Tamukoh
doaj +2 more sources
Advances in Mechanical Engineering, 2016 The objective of this article is to build a field programmable gate array–based six-axis servo control integrated chip which can integrate the function of a motion trajectory planning and the function of six position/speed/current servo controllers into ...
Ying-Shieh Kung +3 more
doaj +2 more sources
International Journal of Advanced Robotic Systems, 2016 Vision-based object tracking has lots of applications in robotics, like surveillance, navigation, motion capturing, and so on. However, the existing object tracking systems still suffer from the challenging problem of high computation consumption in the ...
Congyi Lyu +4 more
doaj +2 more sources
Diffuse Correlation Spectroscopy Analysis Implemented on a Field Programmable Gate Array [PDF]
IEEE Access, 2019 Diffusive correlation spectroscopy (DCS) is an emerging optical technique that measures blood perfusion in deep tissue. In a DCS measurement, temporal changes in the interference pattern of light, which has passed through tissue, are quantified by an ...
Wei Lin +4 more
doaj +2 more sources
Applied Sciences, 2021 The degradation effect of a field-programmable gate array becomes a significant issue due to the high density of logic circuits inside the field-programmable gate array. The degradation effect occurs because of the rapid technology scaling process of the
Anuar Jaafar +4 more
doaj +1 more source
A detailed router for field-programmable gate arrays [PDF]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1992 A detailed routing algorithm, called the coarse graph expander (CGE), that has been designed specifically for field-programmable gate arrays (FPGAs) is described. The algorithm approaches this problem in a general way, allowing it to be used over a wide range of different FPGA routing architectures. It addresses the issue of scarce routing resources by
Stephen Brown 0003 +2 more
openaire +1 more source
Block cipher four implementation on field programmable gate array
Communications in Science and Technology, 2020 Block ciphers are used to protect data in information systems from being leaked to unauthorized people. One of many block cipher algorithms developed by Indonesian researchers is the BCF (Block Cipher-Four) - a block cipher with 128-bit input/output that
Yusuf Kurniawan, Muhammad Adli Rizqulloh
doaj +1 more source
FPGA Implementation of Threshold-Type Binary Memristor and Its Application in Logic Circuit Design
Micromachines, 2021 In this paper, a memristor model based on FPGA (field programmable gate array) is proposed, by using which the circuit of AND gate and OR gate composed of memristors is built. Combined with the original NOT gate in FPGA, the NAND gate, NOR gate, XOR gate
Liu Yang +3 more
doaj +1 more source
Optimal E-Field Vector Combination for a Highly Focused Antenna-Array [PDF]
, 2014 A near-field highly focused circular phased-array antenna for 5.8-GHz radio frequency identification (RFID) applications is presented. The electric field (E-field) at the focus is enhanced by a constructive vector combination in a three-dimensional (3-D)
Perallos, Asier +5 more
core +1 more source