Results 11 to 20 of about 8,870 (257)

A Four-Context Programmable Optically Reconfigurable Gate Array With a Reflective Silver-Halide Holographic Memory

IEEE Photonics Journal, 2011
This paper presents a proposal for a four-context programmable optically reconfigurable gate array (PORGA) with a high-resolution reflective silver-halide holographic memory and a corresponding writer system.
Shinya Kubota, Minoru Watanabe
doaj   +1 more source

Implementing EW Receivers Based on Large Point Reconfigured FFT on FPGA Platforms [PDF]

International Journal of Computational Intelligence Systems, 2011
This paper presents design and implementation of digital receiver based on large point fast Fourier transform (FFT) suitable for electronic warfare (EW) applications.
He Chen, Xiujie Qu, Yuedong Luo, Chenwei Deng   +3 more
doaj   +1 more source

Real-time object tracking system based on field-programmable gate array and convolution neural network

International Journal of Advanced Robotic Systems, 2016
Vision-based object tracking has lots of applications in robotics, like surveillance, navigation, motion capturing, and so on. However, the existing object tracking systems still suffer from the challenging problem of high computation consumption in the ...
Congyi Lyu, Haoyao Chen, Xin Jiang, Peng Li, Yunhui Liu   +4 more
doaj   +1 more source

A Field Programmable Gate Array (FPGA) Based Non-Linear Filters for Gas Turbine Prognostics

International Journal of Prognostics and Health Management, 2021
The removal of noise from signals obtained through the health monitoring systems in gas turbines is an important consideration for accurate prognostics.
Jayant Kumar Nayak, Vatsala Prasad, Ranjan Ganguli   +2 more
doaj   +1 more source

Parallelized Particle Swarm Optimization on FPGA for Realtime Ballistic Target Tracking

Sensors, 2023
This paper addresses the problem of tracking a high-speed ballistic target in real time. Particle swarm optimization (PSO) can be a solution to overcome the motion of the ballistic target and the nonlinearity of the measurement model. However, in general,
Juhyeon Park, Heoncheol Lee, Hyuck-Hoon Kwon, Yeji Hwang, Wonseok Choi   +4 more
doaj   +1 more source

Implementation of fractional order integrator/differentiator on field programmable gate array

Alexandria Engineering Journal, 2016
Concept of fractional order calculus is as old as the regular calculus. With the advent of high speed and cost effective computing power, now it is possible to model the real world control and signal processing problems using fractional order calculus ...
K.P.S. Rana, V. Kumar, N. Mittra, N. Pramanik   +3 more
doaj   +1 more source

Programmable Clock Distribution Using Switching Matrices for Field Programmable Gate Arrays

IEEE Access
Every digital systems using very large scale integration require clock distributions, for which a dedicated clock tree or a mesh clock is frequently used.
Ayumu Ogura, Minoru Watanabe, Nobuya Watanabe   +2 more
doaj   +1 more source

Design of Novel Field Programmable Gate Array-Based Hearing Aid

IEEE Access, 2019
Hearing loss is one of the most common chronic diseases. For people with hearing loss, communicating with other people, particularly in an environment with considerable background noise, is difficult. Recently, several hearing aids have been developed to
Bor-Shing Lin, Po-Yu Yang, Ching-Feng Liu, Yi-Chia Huang, Chengyu Liu, Bor-Shyh Lin   +5 more
doaj   +1 more source

IMPLEMENTATION OF FUNCTIONAL BLOCK RADIO UNIT BASED ON SYSTEM-ON-CHIP

Eurasian Physical Technical Journal
This article discusses the implementation of the Radio Unit functional block based on the System-on-Chip. The primary focus was on integrating Radio Unit blocks such as modulation and Fast Fourier Transform on Field-Programmable Gate Array.
M.K. Ibraimov, Y.T. Kozhagulov, D.M. Zhexebay, S.A. Sarmanbetov   +3 more
doaj   +1 more source

High-resolution FPGA-pulse width modulation applied to PFC 2 MHz converter using eGaN field effect transistor

The Journal of Engineering, 2019
This study proposes an implementation based on a low-cost field-programmable gate array (FPGA) of a high-resolution pulse width modulation applied on a single-phase power factor correction (PFC) converter operating with 2 MHz switch frequency.
José Augusto Arbugeri, Cesar Augusto Arbugeri, Samir Ahmad Mussa   +2 more
doaj   +1 more source