Results 11 to 20 of about 8,015,697 (282)
Mixed-precision weights network for field-programmable gate array. [PDF]
PLoS ONE, 2021 In this study, we introduced a mixed-precision weights network (MPWN), which is a quantization neural network that jointly utilizes three different weight spaces: binary {-1,1}, ternary {-1,0,1}, and 32-bit floating-point.
Ninnart Fuengfusin, Hakaru Tamukoh
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Field Programmable Gate Array [PDF]
, 2017 In this chapter, we describe the design of a field programmable gate array (FPGA) board capable of acquiring the information coming from a fast digitization of the signals generated in a drift chambers. The digitized signals are analyzed using an ad hoc real‐time algorithm implemented in the FPGA in order to reduce the data throughput coming from the ...
Gianluigi Chiarello +6 more
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Field Programmable Gate Array Applications—A Scientometric Review
Computation, 2019 Field Programmable Gate Array (FPGA) is a general purpose programmable logic device that can be configured by a customer after manufacturing to perform from a simple logic gate operations to complex systems on chip or even artificial intelligence systems.
Juan Ruiz-Rosero +2 more
doaj +3 more sources
Advances in Mechanical Engineering, 2016 The objective of this article is to build a field programmable gate array–based six-axis servo control integrated chip which can integrate the function of a motion trajectory planning and the function of six position/speed/current servo controllers into ...
Ying-Shieh Kung +3 more
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Diffuse Correlation Spectroscopy Analysis Implemented on a Field Programmable Gate Array [PDF]
IEEE Access, 2019 Diffusive correlation spectroscopy (DCS) is an emerging optical technique that measures blood perfusion in deep tissue. In a DCS measurement, temporal changes in the interference pattern of light, which has passed through tissue, are quantified by an ...
Wei Lin +4 more
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Space-time trellis codes: Field programmable gate array approach
, 2023 In this paper, an effective method of implementation of Space-Time Trellis Codes (STTC) for 4-state on Field Programmable Gate Array is presented.
Mallikarjuna Gowda C. P., Raju Hajare
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Efficient architectures and power modelling of multiresolution analysis algorithms on FPGA [PDF]
, 2011 This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.In the past two decades, there has been huge amount of interest in Multiresolution Analysis Algorithms (MAAs) and their applications.
Sazish, Abdul Naser
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Applied Sciences, 2021 The degradation effect of a field-programmable gate array becomes a significant issue due to the high density of logic circuits inside the field-programmable gate array. The degradation effect occurs because of the rapid technology scaling process of the
Anuar Jaafar +4 more
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Block cipher four implementation on field programmable gate array
Communications in Science and Technology, 2020 Block ciphers are used to protect data in information systems from being leaked to unauthorized people. One of many block cipher algorithms developed by Indonesian researchers is the BCF (Block Cipher-Four) - a block cipher with 128-bit input/output that
Yusuf Kurniawan, Muhammad Adli Rizqulloh
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A detailed router for field-programmable gate arrays [PDF]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1992 A detailed routing algorithm, called the coarse graph expander (CGE), that has been designed specifically for field-programmable gate arrays (FPGAs) is described. The algorithm approaches this problem in a general way, allowing it to be used over a wide range of different FPGA routing architectures. It addresses the issue of scarce routing resources by
Stephen Brown 0003 +2 more
openaire +3 more sources