Results 21 to 30 of about 21,529 (302)

Design of Novel Field Programmable Gate Array-Based Hearing Aid

IEEE Access, 2019
Hearing loss is one of the most common chronic diseases. For people with hearing loss, communicating with other people, particularly in an environment with considerable background noise, is difficult. Recently, several hearing aids have been developed to
Bor-Shing Lin, Po-Yu Yang, Ching-Feng Liu, Yi-Chia Huang, Chengyu Liu, Bor-Shyh Lin   +5 more
doaj   +1 more source

IMPLEMENTATION OF FUNCTIONAL BLOCK RADIO UNIT BASED ON SYSTEM-ON-CHIP

Eurasian Physical Technical Journal
This article discusses the implementation of the Radio Unit functional block based on the System-on-Chip. The primary focus was on integrating Radio Unit blocks such as modulation and Fast Fourier Transform on Field-Programmable Gate Array.
M.K. Ibraimov, Y.T. Kozhagulov, D.M. Zhexebay, S.A. Sarmanbetov   +3 more
doaj   +1 more source

High-resolution FPGA-pulse width modulation applied to PFC 2 MHz converter using eGaN field effect transistor

The Journal of Engineering, 2019
This study proposes an implementation based on a low-cost field-programmable gate array (FPGA) of a high-resolution pulse width modulation applied on a single-phase power factor correction (PFC) converter operating with 2 MHz switch frequency.
José Augusto Arbugeri, Cesar Augusto Arbugeri, Samir Ahmad Mussa   +2 more
doaj   +1 more source

Implementation of the block cipher Rijndael using Altera FPGA

Journal of Telecommunications and Information Technology, 2001
A short description of the block cipher Rijndael is presented. Hardware implementation by means of the FPGA (field programmable gate array) technology is evaluated. Im- plementation results compared with other hardware imple- mentations are summarized.
Piotr Mroczkowski
doaj   +1 more source

Implemetasi Komputasi Akar Kuadrat Resolusi Tinggi pada Field Programmable Gate Array (FPGA)

Jurnal Teknologi Informasi dan Ilmu Komputer, 2022
Komputasi akar kuadrat diperlukan pada beberapa proses pengendalian, diantaranya untuk Direct Torque Control (DTC) pada sistem penggerak motor yang membutuhkan proses perhitungan yang sangat cepat.
Muhammad Irfan, Hendra Setiawan
doaj   +1 more source

Space-time trellis codes: Field programmable gate array approach

, 2023
In this paper, an effective method of implementation of Space-Time Trellis Codes (STTC) for 4-state on Field Programmable Gate Array is presented.
Mallikarjuna Gowda C. P., Raju Hajare
core   +1 more source

Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs

, 2008
The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an FPGA.
Philip Brisk, Frank K. Gurkaynak, Ajay K. Verma, Yusuf Leblebici, Alessandro Cevrero, Verma, Ajay K., Cevrero, Alessandro, Athanasopoulos, Panagiotis, Leblebici, Yusuf, Paolo Ienne, Brisk, Philip, Ienne, Paolo, Parandeh-Afshar, Hadi, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Gurkaynak, Frank K.   +15 more
core   +1 more source

Wykorzystanie struktur FPGA do implementacji algorytmów cyfrowego przetwarzania sygnałów [PDF]

Problemy Mechatroniki, 2017
W artykule opisano zaprojektowany, wykonany praktycznie oraz przebadany dwukanałowy tor cyfrowego przetwarzania sygnału z układem FPGA (Field-Programmable Gate Array), w którym zaimplementowano algorytmy DSP.
Stanisław GRZYWIŃSKI, Krzysztof ACHTENBERG   +1 more
doaj   +1 more source

Integration of Low‐Voltage Nanoscale MoS2 Memristors on CMOS Microchips

Advanced Functional Materials, EarlyView.
This article presents the first monolithic integration of nanoscale MoS2‐based memristors into the back‐end‐of‐line of foundry‐fabricated CMOS microchips in a one‐transistor‐one‐resistor (1T1R) architecture. The MoS2‐based 1T1R cells exhibit forming‐free, nonvolatile resistive switching with ultra‐low operating voltages, low cycle‐to‐cycle variability ...
Jimin Lee, Sofía Cruces, Xiaohua Liu, Yang Chen, Vasilis A. Maroufidis, Janghyun Jo, Lukas Völkel, Dennis Braun, Michael Möller, Leon Brackmann, Holger Kalisch, Michael Heuken, Andrei Vescan, Rafal E. Dunin‐Borkowski, Joachim Mayer, Stefan Wiefels, Max C. Lemme   +16 more
wiley   +1 more source

A Multiscroll Chaotic Attractors with Arrangement of Saddle-Shapes and Its Field Programmable Gate Array (FPGA) Implementation

Complexity, 2020
Based on the step function and signum function, a chaotic system which can generate multiscroll chaotic attractors with arrangement of saddle-shapes is proposed and the stability of its equilibrium points is analyzed.
Faqiang Wang, Yufang Xiao
doaj   +1 more source