Results 31 to 40 of about 8,015,697 (282)

Wykorzystanie struktur FPGA do implementacji algorytmów cyfrowego przetwarzania sygnałów [PDF]

Problemy Mechatroniki, 2017
W artykule opisano zaprojektowany, wykonany praktycznie oraz przebadany dwukanałowy tor cyfrowego przetwarzania sygnału z układem FPGA (Field-Programmable Gate Array), w którym zaimplementowano algorytmy DSP.
Stanisław GRZYWIŃSKI, Krzysztof ACHTENBERG   +1 more
doaj   +1 more source

Symmetry‐Guided Multifunctional Acoustic System Based on Mechanically Actuated Sonic Crystals

Advanced Engineering Materials, EarlyView.
This study presents the design, simulation, and experimental validation of amultifunctional acoustic metamaterial based on rotationally engineered sonic crystals.By tuning cylinder orientations, controllable band gaps and six distinct functionalities—including switching, topological insulation, beam splitting, and logic operations—areachieved ...
Yuanyan Zhao, Sriram Subramanian, Gianluca Memoli   +2 more
wiley   +1 more source

Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs

, 2008
The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an FPGA.
Philip Brisk, Frank K. Gurkaynak, Ajay K. Verma, Yusuf Leblebici, Alessandro Cevrero, Verma, Ajay K., Cevrero, Alessandro, Athanasopoulos, Panagiotis, Leblebici, Yusuf, Paolo Ienne, Brisk, Philip, Ienne, Paolo, Parandeh-Afshar, Hadi, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Gurkaynak, Frank K.   +15 more
core   +1 more source

Field Programmable Gate Array Reliability Analysis Using the Dynamic Flowgraph Methodology

Nuclear Engineering and Technology, 2016
Field programmable gate array (FPGA)-based systems are thought to be a practical option to replace certain obsolete instrumentation and control systems in nuclear power plants.
Phillip McNelles, Lixuan Lu
doaj   +1 more source

All‐in‐One Analog AI Hardware: On‐Chip Training and Inference with Conductive‐Metal‐Oxide/HfOx ReRAM Devices

Advanced Functional Materials, EarlyView.
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone, Victoria Clerico, Wooseok Choi, Tommaso Stecconi, Folkert Horst, Laura Bégon‐Lours, Matteo Galetta, Antonio La Porta, Nikhil Garg, Fabien Alibart, Bert Jan Offrein, Valeria Bragaglia   +11 more
wiley   +1 more source

Real-time optical character recognition on field programmable gate array for automatic number plate recognition system

, 2013
The last main stage in an automatic number plate recognition system (ANPRs) is optical character recognition (OCR), where the number plate characters on the number plate image are converted into encoded texts.
Faycal Bensaali, Sotudeh, Reza, Xiaojun Zhai, Reza Sotudeh, Zhai, Xiaojun, Bensaali, Faycal   +5 more
core   +1 more source

REAL-TIME CLASSIFICATION OF OBJECTS BY COLOR USING FIELD PROGRAMMABLE GATE ARRAY

Revista de Investigaciones Universidad del Quindío, 2012
Este artículo presenta un sistema para la clasificación de objetos por color en tiempo real realizada sobre una secuencia de video a 20 cuadros por Segundo (Frames Per Second, FPS).
Manuel Alejandro Tamayo-Monsalve, Nubia Liliana Montes-Castrillón, Gustavo Adolfo Osorio-Londoño   +2 more
doaj   +1 more source

A Multiscroll Chaotic Attractors with Arrangement of Saddle-Shapes and Its Field Programmable Gate Array (FPGA) Implementation

Complexity, 2020
Based on the step function and signum function, a chaotic system which can generate multiscroll chaotic attractors with arrangement of saddle-shapes is proposed and the stability of its equilibrium points is analyzed.
Faqiang Wang, Yufang Xiao
doaj   +1 more source

Integration of Low‐Voltage Nanoscale MoS2 Memristors on CMOS Microchips

Advanced Functional Materials, EarlyView.
This article presents the first monolithic integration of nanoscale MoS2‐based memristors into the back‐end‐of‐line of foundry‐fabricated CMOS microchips in a one‐transistor‐one‐resistor (1T1R) architecture. The MoS2‐based 1T1R cells exhibit forming‐free, nonvolatile resistive switching with ultra‐low operating voltages, low cycle‐to‐cycle variability ...
Jimin Lee, Sofía Cruces, Xiaohua Liu, Yang Chen, Vasilis A. Maroufidis, Janghyun Jo, Lukas Völkel, Dennis Braun, Michael Möller, Leon Brackmann, Holger Kalisch, Michael Heuken, Andrei Vescan, Rafal E. Dunin‐Borkowski, Joachim Mayer, Stefan Wiefels, Max C. Lemme   +16 more
wiley   +1 more source

A hybrid swarm intelligence of artificial immune system tuned with Taguchi–genetic algorithm and its field-programmable gate array realization to optimal inverse kinematics for an articulated industrial robotic manipulator

Advances in Mechanical Engineering, 2016
This article presents a hybrid swarm intelligence of artificial immune system tuned with Taguchi–genetic algorithm and its field-programmable gate array realization to optimal inverse kinematics for a 5-degree-of-freedom industrial robotic manipulator ...
Hsu-Chih Huang, Sendren Sheng-Dong Xu, Chang Han Wu   +2 more
doaj   +1 more source