Results 131 to 140 of about 24,676 (260)

Large Language Model for Verilog Generation with Code-Structure-Guided Reinforcement Learning [PDF]

Ning Wang, Bingkun Yao, Jie Zhou, Xi Wang, Zhe Jiang, Nan Guan   +5 more
openalex   +1 more source

Analysis and implementation of SDF Radix-2 FFT processor using VERILOG Hardware Description Language

, 2020
Phuong Ha Lai
openalex   +1 more source

Implementation of Turbo Coder Using Verilog HDL for LTE

, 2022
V S Sneha, Nithin Joe
openalex   +1 more source

Parallel Processing of Sobel Edge Detection on FPGA: Enhancing Real-Time Image Analysis. [PDF]

Sensors (Basel)
Ravichandran S, Su HK, Kuo WK, Dhanasekaran D, Mahalingam M, Yang JP.   +5 more
europepmc   +1 more source

A New Successive Time Balancing Time-to-Digital Conversion Method. [PDF]

Sensors (Basel), 2023
Jurasz K, Kościelnik D, Szyduczyński J, Machowski W.   +3 more
europepmc   +1 more source

Compact quantum dot models for analog microwave co-simulation. [PDF]

npj Quantum Inf
Peri L, Gomez-Saiz A, Ford CJB, Gonzalez-Zalba MF.   +3 more
europepmc   +1 more source

MOSFET Physics-Based Compact Model Mass-Produced: An Artificial Neural Network Approach. [PDF]

Micromachines (Basel), 2023
Huang S, Wang L.
europepmc   +1 more source

Implementation of DDR SDRAM Controller using Verilog HDL

, 2015
Iosr Journals, Mayuri Sanwatsarkar, Jagdish Nagar   +2 more
openalex   +1 more source

Optimized NCFET-based approximate multiplier for energy-aware image applications. [PDF]

Sci Rep
Srinivas MBR, Elango K.
europepmc   +1 more source

Logic Circuits Lab - Breadboard or Verilog [PDF]

Nashwa Elaraby, A. B Shafaye, Steven Grosse   +2 more
openalex   +1 more source