Results 161 to 170 of about 37,772 (288)

2-D IMPLEMENTATION OF DIGITAL GABOR FILTER DESIGN USING VERILOG

, 2013
K. J. SUSHANTH, N. SHANKARAIAH
openalex   +1 more source

A REVIEW OF LOW VOLTAGE AND LOW POWER CMOS ADDERS USING VLSI DESIGN IN VERILOG/VHDL

, 2021
S. S. Lokesh
openalex   +1 more source

Teaching computer architecture by designing and simulating processors from their bits and bytes. [PDF]

PeerJ Comput Sci
Doğan M, Öztoprak K, Tolun MR.
europepmc   +1 more source

The Verilog® Hardware Description Language [PDF]

, 1991
Donald E. Thomas, Philip R. Moorby
openaire   +1 more source

vlang: Mapping Verilog Netlists to Modern Technologies

, 2021
Nicholas V. Giamblanco, Andrew H. Schmidt   +1 more
openalex   +2 more sources

A Compact Memristor Model Based on Physics-Informed Neural Networks. [PDF]

Micromachines (Basel)
Lee Y, Kim K, Lee J.
europepmc   +1 more source

Implementation of Gate-All-Around Gate-Engineered Charge Plasma Nanowire FET-Based Common Source Amplifier. [PDF]

Micromachines (Basel), 2023
Singh S, Solay LR, Anand S, Kumar N, Ranjan R, Singh A.   +5 more
europepmc   +1 more source

Power and area efficient FIR filter using Radix- 2^r multiplier for de-noise the electrooculography (EOG) signal. [PDF]

Sci Rep
Kumar GK, Chinnapurapu NR, Srinivas K.
europepmc   +1 more source

A High-Performance and Cost-Effective Field Programmable Gate Array-Based Motor Drive Emulator. [PDF]

Micromachines (Basel), 2023
Hernandez J, Rangel-Magdaleno JJ, Morales-Caporal R.   +2 more
europepmc   +1 more source

Enhanced Optimization of Edge Detection for High Resolution Images Using Verilog Hardware Description Language with Low Power Consumption and Less Hardware Technology

, 2016
Manikyala Rao Tankala, Praveen Chakravarthy B. H, Rayapati Sushma, Parameswara Rao G   +3 more
openalex   +1 more source