Results 171 to 180 of about 24,676 (260)

DESIGN AND SIMULATION OF ELEVATOR CONTROLLER USING VERILOG HDL AND IMPLEMENTATION ON FPGA

V Kesthara, K Divyashree, Kushala MK, R. Varsha, R. Aishwarya   +4 more
openalex   +1 more source

VeriGRAG: Enhancing LLM-Based Verilog Code Generation with Structure-Aware Soft Prompts [PDF]

Jiayu Zhao, Song Chen
openalex   +1 more source

Power and area efficient FIR filter using Radix- 2^r multiplier for de-noise the electrooculography (EOG) signal. [PDF]

Sci Rep
Kumar GK, Chinnapurapu NR, Srinivas K.
europepmc   +1 more source

Signal averaging in cryogenic fast field-cycling NMR experiments

Jurkutat M, Safiullin K, Meier B.
europepmc   +1 more source

Memristor-CMOS Hybrid Circuits Implementing Event-Driven Neural Networks for Dynamic Vision Sensor Camera. [PDF]

Micromachines (Basel)
Yoon R, Oh S, Cho S, Min KS.
europepmc   +1 more source

A systematic literature review on the impact of AI models on the security of code generation. [PDF]

Front Big Data
Negri-Ribalta C, Geraud-Stewart R, Sergeeva A, Lenzini G.   +3 more
europepmc   +1 more source

DSM Modelling for Digital Design Using Verilog HDL

, 2017
Xue Xing, Yao Chen, Junchao Wei
openalex   +1 more source

Efficient Change System for Vending Machines Using Verilog HDL [PDF]

K.Suseela, B. K. Madhavi, Ankitha Banala -, Bhavana Duppati -, Deepika Mekala -   +4 more
openalex   +1 more source

Defect-Tolerant Memristor Crossbar Circuits for Local Learning Neural Networks. [PDF]

Nanomaterials (Basel)
Oh S, Yoon R, Min KS.
europepmc   +1 more source

Evaluation of TRNG Bit Distribution via Stable Entropy Source Synchronization on FPGA. [PDF]

Entropy (Basel)
Sato R, Fujiwara M, Nogami Y, Ali MA, Kodera Y.   +4 more
europepmc   +1 more source