Results 181 to 190 of about 37,772 (288)

Memristor-CMOS Hybrid Circuits Implementing Event-Driven Neural Networks for Dynamic Vision Sensor Camera. [PDF]

Micromachines (Basel)
Yoon R, Oh S, Cho S, Min KS.
europepmc   +1 more source

A systematic literature review on the impact of AI models on the security of code generation. [PDF]

Front Big Data
Negri-Ribalta C, Geraud-Stewart R, Sergeeva A, Lenzini G.   +3 more
europepmc   +1 more source

Modeling the Effects of Threading Dislocations on Current in AlGaN/GaN HEMT. [PDF]

Micromachines (Basel), 2023
Liu C, Wang J, Chen Z, Liu J, Su J.
europepmc   +1 more source

Improving Robustness of Dual Port SRAM by finding additional bugs in design using ESPCV flow to compare Schematics v/s Verilog on 12LP GF Technology as an example

, 2019
Sneha Sharma, Madhu Shandilya, O.P. Meena, Naresh Gandham   +3 more
openalex   +1 more source

Free software support for compact modelling with Verilog-A [PDF]

Informacije MIDEM
A. Bürmen, T. Tuma, I. Fajfar, J. Puhan, Ž. Rojec, M. Kunaver, S. Tomažič   +6 more
doaj   +1 more source

DynBlock: dynamic data encryption with Toffoli gate for IoT. [PDF]

Sci Rep
Haq M, Shoukat IA, Naushad A, Jafri MR, Sandhu M, Khan AU, Shin H.   +6 more
europepmc   +1 more source

Design and Implementation of High-Speed Variable Point Pipelined FFT Processor for OFDM System using Verilog

, 2019
V. Brunda
openalex   +2 more sources

Low-Power-Management Engine: Driving DDR Towards Ultra-Efficient Operations. [PDF]

Micromachines (Basel)
Liu Z, Li Y, Zeng X.
europepmc   +1 more source

Ravel-XL: a hardware accelerator for assigned-delay compiled-code logic gate simulation

, 1996
Brown, R. B., Marques-Silva, J. P., Riepe, M. A., Sakallah, K. A.   +3 more
core   +1 more source

Design Environment for Verilog Module Analysis using Open Source Tools

, 2019

openalex   +1 more source