Results 11 to 20 of about 37,772 (288)
Hardware acceleration of number theoretic transform for zk‐SNARK
Engineering Reports, EarlyView., 2023 An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao +6 more
wiley +1 more source
Energies, 2021 Two design flows of the Petri net-based cyber-physical systems oriented towards implementation in an FPGA are presented in the paper. The first method is based on the behavioural description of the system. The control part of the cyber-physical system is
Remigiusz Wisniewski
doaj +1 more source
Open Platform for Digital Design Learning on FPGA-based Systems
Revista Elektrón, 2020 In embedded systems a wide variety of applications can be solved or approached using different technologies, such as microcontrollers, FPGA, Systems on Chip (SoC), among others.
Martín Alejandro Heredia +4 more
doaj +1 more source
QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog [PDF]
ICCD, 2021 The enormous amount of code required to design modern hardware implementations often leads to critical vulnerabilities being overlooked. Especially vulnerabilities that compromise the confidentiality of sensitive data, such as cryptographic keys, have a ...
Lennart M. Reimann +4 more
semanticscholar +1 more source
The Essence of Verilog: A Tractable and Tested Operational Semantics for Verilog
Proc. ACM Program. Lang., 2023 With the increasing need to apply modern software techniques to hardware design, Verilog, the most popular Hardware Description Language (HDL), plays an infrastructure role.
Qinlin Chen +6 more
semanticscholar +1 more source
A Formal Executable Semantics of Verilog [PDF]
, 2010 This paper describes a formal executable semantics for the Verilog hardware description language. The goal of our formalization is to provide a concise and mathematically rigorous reference augmenting the prose of the official language standard, and ...
Katelman, Michael +3 more
core +1 more source
DAVE: Deriving Automatically Verilog from English [PDF]
Workshop on Machine Learning for CAD, 2020 Specifications for digital systems are provided in natural language, and engineers undertake significant efforts to translate these into the programming languages understood by compilers for digital systems.
H. Pearce, Benjamin Tan, R. Karri
semanticscholar +1 more source
Implementation of serial peripheral interface slave device based on uncommitted logic arrays [PDF]
Serbian Journal of Electrical EngineeringMicrocontrollers and microprocessors link to peripheral devices (sensors, converters, transceivers, memory modules) via communication interfaces. One of the most widespread interfaces is the Serial Peripheral Interface (SPI), characterized by ...
Sinyukin Alexander +4 more
doaj +1 more source
Variable domain transformation for linear PAC analysis of mixed-signal systems [PDF]
, 2007 This paper describes a method to perform linear AC analysis on mixed-signal systems which appear strongly nonlinear in the voltage domain but are linear in other variable domains.
Horowitz, M., Jones, K., Kim, J.
core +1 more source
Design and verification of HDLC data frame parallel search and decapsulation module
Dianzi Jishu Yingyong, 2022 The HDLC signal link is the high level data link control(HDLC) developed by the international organization for standar- dization(ISO). The article follows the HDLC standard data link layer specification, uses the hardware description language Verilog HDL
Qian Yong, Liu Wei
doaj +1 more source