Results 241 to 250 of about 37,772 (288)

Verilog (Part 2)

2017
In Chap. 5, Verilog was presented as a way to describe the behavior of concurrent systems. The modeling techniques presented were appropriate for combinational logic because these types of circuits have outputs dependent only on the current values of their inputs.
openaire   +2 more sources

Verilog (Part 1)

2017
Based on the material presented in Chap. 4, there are a few observations about logic design that are apparent. First, the size of logic circuitry can scale quickly to the point where it is difficult to design by hand. Second, the process of moving from a high-level description of how a circuit works (e.g., a truth table) to a form that is ready to be ...
openaire   +2 more sources

Verilog-A modelling of transistor

2022
Industry standard transistor models used for computer aided circuit design are not always accurately predicting transistor performance under all circuit conditions ,include RF and analog circuit behavior. Transistor model are expected not only circuit performance but also reliability and accuracy.
openaire   +1 more source

HaVen: Hallucination-Mitigated LLM for Verilog Code Generation Aligned with HDL Engineers

Design, Automation and Test in Europe
Recently, the use of large language models (LLMs) for Verilog code generation has attracted great research interest to enable hardware design automation.
Yiyao Yang, Fu Teng, Pengju Liu, Mengnan Qi, Chenyang Lv, Ji Li, Xuhong Zhang, Zhezhi He   +7 more
semanticscholar   +1 more source

Mind the Gap: Bridging Verilog and Computer Architecture

International Symposium on Circuits and Systems, 2020
We present an approach to teach RISC processor design for an undergraduate computer architecture course specifically aimed to reduce the gap between a high-level datapath block diagram and a complete Verilog code specification.
Fernando Passe, Michael Canesche, O. V. Neto, J. Nacif, R. Ferreira   +4 more
semanticscholar   +1 more source

Optimizing compiled Verilog

International Verilog HDL Conference, 2002
While optimization of traditional programming languages is reasonably well understood, optimization of hardware description languages is much less so. Hardware description languages provide both a different set of problems and a different set of opportunities for optimization.
R. Allen, M. McNamara
openaire   +2 more sources

DeepRTL: Bridging Verilog Understanding and Generation with a Unified Representation Model

International Conference on Learning Representations
Recent advancements in large language models (LLMs) have shown significant potential for automating hardware description language (HDL) code generation from high-level natural language instructions.
Yi Liu, Changran Xu, Yunhao Zhou, Zeju Li, Qiang Xu   +4 more
semanticscholar   +1 more source

Implementation of Smart Home through FPGA using Verilog Hardware Descriptive Language

2020 IEEE International Conference on Advent Trends in Multidisciplinary Research and Innovation (ICATMRI), 2020
Home Automation involves intelligent control of the electrical and electronic devices of a home, office or building. A project of a home automation system is made in order to control two integral parameters security and comfort of a home.
Ravi Payal, Akanksha Saxena, Beena Chanda   +2 more
semanticscholar   +1 more source

QIF-Verilog: Quantitative Information-Flow based Hardware Description Languages for Pre-Silicon Security Assessment

IEEE International Symposium on Hardware Oriented Security and Trust, 2019
Hardware vulnerabilities are often due to design mistakes because the designer does not sufficiently consider potential security vulnerabilities at the design stage.
Xiaolong Guo, R. Dutta, Jiaji He, M. Tehranipoor, Yier Jin   +4 more
semanticscholar   +1 more source

Design and Analysis of Digital Circuits using Quantum Cellular Automata and Verilog

International Conference on Computing for Sustainable Global Development, 2020
Advancement from Verilog for the design and development of digital ICs is the innovation in QCA (Quantum Cellular Automata) Design which represents ideal cell automation using Quantum dots.
V M Nanditha, U. Sanath Rao, Manasa Murali, R. Swathi, K. Chethana   +4 more
semanticscholar   +1 more source