ASimOV: A Framework for Simulation and Optimization of an Embedded AI Accelerator
Micromachines, 2021 Artificial intelligence algorithms need an external computing device such as a graphics processing unit (GPU) due to computational complexity. For running artificial intelligence algorithms in an embedded device, many studies proposed light-weighted ...
Dong Hyun Hwang +3 more
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A Hardware Descriptive Approach to Beetle Antennae Search
IEEE Access, 2020 Beetle antennae search (BAS) is a newly developed meta-heuristic algorithm which is effectively used for optimizing objective functions of complex forms or even unknown forms.
Zongcheng Yue +5 more
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An efficient hardware architecture for H.264 intra prediction algorithm [PDF]
, 2007 In this paper, we present an efficient hardware architecture for real-time implementation of intra prediction algorithm used in H.264 / MPEG4 Part 10 video coding standard.
Hamzaoglu, Ilker +3 more
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RTL-DEVS: HDL Design and Simulation Methodology for DEVS Formalism-Based Simulation Tool
Telecom, 2022 DEVS (Discrete Event System Specification) is widely used in modeling and simulation fields to design, validate, and implement complex response systems.
Bo-Seung Kwon +4 more
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Making Money from Exploiting Schumpeterian Opportunities: John Sanguinetti and the Electronic Design Automation Industry [PDF]
Technology Innovation Management Review, 2012 Accounts of the effect that John Sanguinetti’s two companies had on the market for integrated circuit design languages were used to gain insights on how to profit from the exploitation of Schumpeterian opportunities.
Arthur Low
doaj
A Novel Standard-Cell-Based Implementation of the Digital OTA Suitable for Automatic Place and Route
Journal of Low Power Electronics and Applications, 2021 This paper presents a novel implementation of a digital-based Operational Transconductance Amplifier (OTA) which has been recently introduced in the technical literature as a fully digital alternative to the conventional differential pair to implement ...
Gaetano Palumbo, Giuseppe Scotti
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Triple frame buffer FPGA implementation
HardwareX, 2019 This article demonstrates a Verilog-based triple frame buffer capable of buffering arbitrary data, such as camera frames, between any two asynchronous processes.
James Williams, Ilya Mikhelson
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Development of Intelligent Building Energy-saving Temperature Control System Based on FPGA [PDF]
E3S Web of Conferences, 2019 The ideal energy-saving building should meet the environmental quality of living space in different seasons with the least energy consumption. The indoor temperature of the building is an important consideration. However, most temperature control systems
Gao Li, Zhang Runmei, Zhang Guangbin
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Bridging the Gap between Design and Simulation of Low-Voltage CMOS Circuits
Journal of Low Power Electronics and Applications, 2022 This work proposes a truly compact MOSFET model that contains only four parameters to assist an integrated circuits (IC) designer in a design by hand. The four-parameter model (4PM) is based on the advanced compact MOSFET (ACM) model and was implemented ...
Cristina Missel Adornes +3 more
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Physics-Based α-IGZO TFTs Compact Modeling and Neural Network Application With 2T0C DRAM Cell
IEEE AccessAdvanced amorphous oxide devices such as amorphous InGaZnO ( $\alpha $ -IGZO) operate based on mechanisms that differ significantly from those of conventional Si-based devices, primarily due to structural differences.
Hyoungsoo Kim +4 more
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