Results 81 to 90 of about 24,676 (260)
Generation of Synthesizable Verilog Code From Natural Language Specifications
IEEE AccessThis study presents a method for generating synthesizable Verilog code for digital integrated circuits directly from natural-language specifications. The approach combines large language models with parameter-efficient fine-tuning (specifically, Low-Rank
Daniil S. Yashchenko +4 more
doaj +1 more source
Formal Verification of an Iterative Low-Power x86 Floating-Point Multiplier with Redundant Feedback
, 2011 We present the formal verification of a low-power x86 floating-point multiplier. The multiplier operates iteratively and feeds back intermediate results in redundant representation. It supports x87 and SSE instructions in various precisions and can block
Anna Slobodová +16 more
core +2 more sources
Privacy Leakages in Approximate Adders
, 2018 Approximate computing has recently emerged as a promising method to meet the low power requirements of digital designs. The erroneous outputs produced in approximate computing can be partially a function of each chip's process variation. We show that, in
Holcomb, Daniel, Keshavarz, Shahrzad
core +1 more source
Perancangan dan Implementasi Algoritma DES untuk Mikroprosesor Enkripsi dan Dekripsi pada FPGA
Jurnal Teknologi dan Sistem Komputer, 2015 Seiring dengan semakin luasnya penerapan teknologi komputasi di sekitar kita, menjadikan informasi menjadi sangat mudah dan cepat untuk disebarkan. Kita dapat mengakses informasi dan data-data yang kita butuhkan dengan mudah. Namun permasalahan yang kita
Imaduddin Amrullah Muslim +2 more
doaj +1 more source
Towards An Automated Approach to Hardware/Software Decomposition [PDF]
, 2003 We propose in this paper an algebraic approach to hard-ware/software partitioning in Verilog Hardware Description Language (HDL). We explore a collection of algebraic laws for Verilog programs, from which we design a set of syntax-based algebraic rules ...
Chin, Wei Ngan +2 more
core
Eternal-Thing 3.0: Mixed-Mode SoC for Energy Harvesting System Towards Sustainable IoT
IEEE AccessThe power requirement in IoT is essential to fulfill the energy demand of the power-hungry sensors at end nodes. The use of fixed batteries restricts sustainability and makes the system costly.
Saswat Kumar Ram +4 more
doaj +1 more source
Acceleration of Simulated Fault Injection Using a Checkpoint Forwarding Technique
ETRI Journal, 2017 Simulated fault injection (SFI) is widely used to assess the effectiveness of fault tolerance mechanisms in safety‐critical embedded systems (SCESs) because of its advantages such as controllability and observability.
Jongwhoa Na, Dongwoo Lee
doaj +1 more source
MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation
2024 IEEE LLM Aided Design Workshop (LAD)Large Language Models (LLMs) have recently shown promise in streamlining hardware design processes by encapsulating vast amounts of domain-specific data. In addition, they allow users to interact with the design processes through natural language instructions, thus making hardware design more accessible to developers.
Zhang, Yongan +4 more
openaire +2 more sources