Results 11 to 20 of about 425 (179)
Deep Ensemble of Weighted Viterbi Decoders for Tail-Biting Convolutional Codes
Tail-biting convolutional codes extend the classical zero-termination convolutional codes: Both encoding schemes force the equality of start and end states, but under the tail-biting each state is a valid termination.
Tomer Raviv +2 more
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Power-Efficient Viterbi Decoder Architecture and Field Programmeble Gate Arrays Fpga Implementation
A Viterbi decoder systemcomprises a convolutional encoder and Viterbi decoder. In general, the codewords generated from the input series of convolutional encoder arrive at thedecoder through a noisy channel; however, the channel noise can causecorruption
Burcu Özbay, Serap Çekli
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Comparative Analysis of On-Chip FPGA Memory Architectures for Viterbi Decoder Implementation in DVB Systems [PDF]
High-definition Digital Video Broadcasting (DVB) systems demand high data rates, resulting in increased hardware complexity and power consumption, with the Viterbi decoder (VD) being a key contributor.
Asmaa Mosbeh +3 more
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A New Viterbi-Based Decoding Strategy for Market Risk Tracking: an Application to the Tunisian Foreign Debt Portfolio during 2010-2012 [PDF]
In this paper, a novel market risk tracking and prediction strategy is introduced. Our approach takes volatility clustering into account and allows for the possibility of regime shifts in the intra-portfolio's latent correlation structure.
Mohamed Saidane
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Performance of Soft Viterbi Decoder enhanced with Non-Transmittable Codewords for storage media
The introduction of Non-Transmittable Codewords (NTCs) into Viterbi Algorithm Decoder has emerged as one of the best ways of improving performance of the Viterbi Algorithm Decoder.
Kilavo Hassan +2 more
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Log-Likelihood Ratio to Improve Hard DecisionViterbi Algorithm [PDF]
Hard decision of Viterbi decoder suffer from the need of high Signal to Noise Ratio (SNR) to achieve reasonable Bit Error Rate (BER). For the purpose of improving the efficiency of its performance, it must increase the constraint length of the code, in ...
Mahmood Farhan Mosleh, Fa’aza Abid
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Design of high-speed and low-latency Viterbi decoder
In a Viterbi decoder, there are two known memory organization techniques for the storage of survivor sequences, namely register exchange method and traceback method.
Yang Min
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Building a sophisticated forecasting framework for solar and photovoltaic power production in geographic zones with severe meteorological conditions is very challenging.
Joseph Ndong, Ted Soubdhan
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Divergence coding for convolutional codes
In the paper we propose a new coding/decoding on the divergence principle. A new divergent multithreshold decoder (MTD) for convolutional self-orthogonal codes contains two threshold elements.
Valery Zolotarev +4 more
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Wireless smart utility network (Wi-SUN) is one of the wireless communication technologies that realize the Internet of things (IoT). The existing Wi-SUN adopts frequency shift keying compliant with IEEE 802.15.4 for smart utility networks, also known as ...
Yudai Morikawa +2 more
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