Results 201 to 210 of about 121,840 (219)

A VLSI layout for a pipelined Dadda multiplier

ACM Transactions on Computer Systems, 1983
Peter R Cappello, Kenneth Steiglitz
exaly  

VLSI

2014
openaire   +1 more source

A Memetic Algorithm for VLSI Floorplanning

IEEE Transactions on Systems, Man, and Cybernetics, 2007
Maolin Tang, Xin Yao
exaly  

Fault-Tolerant Design for VLSI: Effect of Interconnect Requirements on Yield Improvement of VLSI Designs

IEEE Transactions on Computers, 1982
exaly  

Probabilistic synaptic weighting in a reconfigurable network of VLSI integrate-and-fire neurons

Neural Networks, 2001
David H Goldberg, Gert Cauwenberghs, Andreas G Andreou   +2 more
exaly  

VLSI for the new era

Integration, 2014
José L. Ayala, Katzalin Olcoz
openaire   +1 more source

The complexity of minimizing wire lengths in VLSI layouts

Information Processing Letters, 1987
exaly  

On the Analysis and Synthesis of VLSI Algorithms

IEEE Transactions on Computers, 1982
exaly  

Partitioned Matrix Algorithms for VLSI Arithmetic Systems

IEEE Transactions on Computers, 1982
exaly  

VLSI

1989
openaire   +1 more source