Results 181 to 190 of about 47,374 (229)

VLSI technology in China

IEEE Communications Magazine, 1993
Very-large-scale integration (VLSI) technology applications, developments, and markets in China are discussed. It is suggested that VLSI technology is gaining momentum in China, especially in the area of application specific integrated circuits (ASICs) development.
Chongxi Feng, Yichao Wang
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On the Complexity of VLSI Computations

1981
We present four results on the complexity of VLSI computations: a) We further justify the Boolean circuit model [Vu, Sa, LS] by showing that it is able to model multi-directional VLSI devices [e.g. pass transistors, pre-charged bus drivers). b) We prove a general cutting theorem for compact regions in Rd Cd≥2) that allows us to drop ...
Lengauer, T., Mehlhorn, K.
openaire   +2 more sources

VLSI - Entwurfssystem (VENUS)

1984
Der Stand der Halbleiterfertigungstechnologie erlaubt die Herstellung von Bausteinen mit mehr als 100.000 Transistoren. Der Entwurf von Schaltungen, der diese technologischen Moglichkeiten ausnutzen mochte, ist nur noch mit massiver Rechnerunterstutzung moglich.
Klaus Blondin, Martin Nett
openaire   +1 more source

Hardware security in VLSI

Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI, 2011
This special session addresses the increasingly critical area of hardware security in VLSI. As computing becomes ubiquitous, most systems need to implement various layers of security, all of which rely on the security of the underlying hardware. At the same time, persistent trends in VLSI are producing challenges and opportunities in the design of ...
Wayne P. Burleson, Yusuf Leblebici
openaire   +1 more source

Crosstalk in VLSI interconnections

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1999
We address the problem of crosstalk computation and reduction using circuit and layout techniques in this paper. We provide easily computable expressions for crosstalk amplitude and pulse width in resistive, capacitively coupled lines. The expressions hold for nets with arbitrary number of pins and of arbitrary topology under any specified input ...
Ashok Vittal, Lauren Hui Chen, Malgorzata Marek-Sadowska, Kai-Ping Wang, Sherry Yang 0003   +4 more
openaire   +1 more source

On-line testing for VLSI

Proceedings International Test Conference 1997, 2002
A large variety of on-line testing techniques for VLSI was developed in the past and are still enriched by new developments. They can respond efficiently to the increasing complexity of VLSI circuits under the condition that available CAD tools simplify their implementation.
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The TInMANN VLSI chip

IEEE Transactions on Neural Networks, 1992
A massively parallel, all-digital, stochastic architecture-TInMANN-that acts as a Kohonen self-organizing feature map is described. A VLSI design is shown for a TInMANN neuron which fits within a small, inexpensive MOSIS TinyChip frame, yet which can be configured to build networks of arbitrary size.
Matthew S. Melton, Tan Phan, Douglas S. Reeves, David E. van den Bout   +3 more
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Verifying VLSI Circuits

2009
Circuit-level verification is a promising area for formal methods research. Simulation using tools such as SPICE remains the main method for circuit validation. Increasing integration densities have increased the prevalence of analog/mixed-signal designs.
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Universal hashing in VLSI

2006
A problem is presented with deterministic VLSI complexity AT det 2 =Ω(N2), but Las Vegas complexity only AT Las Vegas 2 =O (N poly(logN)). (The Las Vegas algorithm always decides correctly, but T is only the expected running time; A is the area of the chip).
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VLSI programming

Proceedings 1988 IEEE International Conference on Computer Design: VLSI, 2003
Kees van Berkel 0001, Martin Rem, Ronald W. J. J. Saeijs   +2 more
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