Results 161 to 170 of about 47,374 (229)

Wafer-scale 2D MoSâ‚‚ transistors with sub-5 nm channel length and subthreshold performance beyond the silicon limit. [PDF]

open access: yesNat Commun
Lin S   +18 more
europepmc   +1 more source

A novel observation of negative differential resistance in a standard CMOS transistor and its application to a compact frequency doubler. [PDF]

open access: yesMicrosyst Nanoeng
Kwak B   +12 more
europepmc   +1 more source
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VLSI for OFDM

IEEE Communications Magazine, 1998
This article discusses the VLSI implications of high-speed coded orthogonal frequency-division multiplexing modulation. This is achieved by looking at practical examples of the computational blocks that constitute a COFDM modem and then examining examples of COFDM chips.
Neil Weste, David J. Skellern
openaire   +2 more sources

A neuromime in VLSI

IEEE Transactions on Neural Networks, 1996
Using conventional very large scale integration (VLSI) technology, a flexible and comprehensive neuromime circuit has been implemented in silicon for the purpose of modeling nerve networks from living organisms. Based on the "integrate-and-fire" model of neuronal threshold, the circuit was fabricated in two-micron CMOS with double-level metal.
Seth Wolpert, Evangelia Micheli-Tzanakou
openaire   +2 more sources

External Sorting in VLSI

IEEE Transactions on Computers, 1984
The problem of sorting n elements using VLSI chips that can sort only q(q < n) elements at a time is considered. The proposed VLSI chip consists of a mesh of trees. Two classical algorithms, i.e., merge sort and bitonic sort, are modified to efficiently solve the external sorting problem using this chip.
BONUCCELLI, MAURIZIO ANGELO   +2 more
openaire   +2 more sources

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