Results 171 to 180 of about 121,840 (219)
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On the Complexity of VLSI Computations
1981We present four results on the complexity of VLSI computations: a) We further justify the Boolean circuit model [Vu, Sa, LS] by showing that it is able to model multi-directional VLSI devices [e.g. pass transistors, pre-charged bus drivers). b) We prove a general cutting theorem for compact regions in Rd Cd≥2) that allows us to drop ...
Lengauer, T., Mehlhorn, K.
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1997
The performance of high-speed electronic systems is limited by interconnect-related failure modes such as coupled noise. We propose new techniques for alleviating the problems caused by coupling between signal lines on integrated circuits. We show that models used by previous work on coupled noise-constrained layout synthesis do not allow the use of ...
Ashok Vittal, Malgorzata Marek-Sadowska
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The performance of high-speed electronic systems is limited by interconnect-related failure modes such as coupled noise. We propose new techniques for alleviating the problems caused by coupling between signal lines on integrated circuits. We show that models used by previous work on coupled noise-constrained layout synthesis do not allow the use of ...
Ashok Vittal, Malgorzata Marek-Sadowska
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1984
Der Stand der Halbleiterfertigungstechnologie erlaubt die Herstellung von Bausteinen mit mehr als 100.000 Transistoren. Der Entwurf von Schaltungen, der diese technologischen Moglichkeiten ausnutzen mochte, ist nur noch mit massiver Rechnerunterstutzung moglich.
Klaus Blondin, Martin Nett
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Der Stand der Halbleiterfertigungstechnologie erlaubt die Herstellung von Bausteinen mit mehr als 100.000 Transistoren. Der Entwurf von Schaltungen, der diese technologischen Moglichkeiten ausnutzen mochte, ist nur noch mit massiver Rechnerunterstutzung moglich.
Klaus Blondin, Martin Nett
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Proceedings International Test Conference 1997, 2002
A large variety of on-line testing techniques for VLSI was developed in the past and are still enriched by new developments. They can respond efficiently to the increasing complexity of VLSI circuits under the condition that available CAD tools simplify their implementation.
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A large variety of on-line testing techniques for VLSI was developed in the past and are still enriched by new developments. They can respond efficiently to the increasing complexity of VLSI circuits under the condition that available CAD tools simplify their implementation.
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The impact of VLSI on microprogramming
ACM SIGMICRO Newsletter, 1986There are four “cultures” of microprogramming: the Bit-Slice Culture, the Commercial Processor Culture, the Microprogrammable Processor Culture, and the Single-Chip Culture. The effect of trends in VLSI (Very Large Scale Integration) on microprogramming can be assessed by looking the effect on each culture.
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Proceedings 1988 IEEE International Conference on Computer Design: VLSI, 2003
Kees van Berkel 0001 +2 more
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Kees van Berkel 0001 +2 more
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IEEE Transactions on Computers, 1984
This tutorial paper addresses some of the principles and provides examples of concurrent architectures and designs that have been inspired by VLSI technology. The circuit density offered by VLSI provides the means for implementing systems with very large numbers of computing elements, while its physical characteristics provide an incentive to organize ...
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This tutorial paper addresses some of the principles and provides examples of concurrent architectures and designs that have been inspired by VLSI technology. The circuit density offered by VLSI provides the means for implementing systems with very large numbers of computing elements, while its physical characteristics provide an incentive to organize ...
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2009
Circuit-level verification is a promising area for formal methods research. Simulation using tools such as SPICE remains the main method for circuit validation. Increasing integration densities have increased the prevalence of analog/mixed-signal designs.
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Circuit-level verification is a promising area for formal methods research. Simulation using tools such as SPICE remains the main method for circuit validation. Increasing integration densities have increased the prevalence of analog/mixed-signal designs.
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1995
We develop a new form of formal operational semantics, suitable for concurrent programming languages. The semantics directly supports sequential and parallel composition, rendezvous synchronization, shared variables, and non-determinism. Based on an abstract notion of program execution, a refinement relation is defined.
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We develop a new form of formal operational semantics, suitable for concurrent programming languages. The semantics directly supports sequential and parallel composition, rendezvous synchronization, shared variables, and non-determinism. Based on an abstract notion of program execution, a refinement relation is defined.
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2006
A problem is presented with deterministic VLSI complexity AT det 2 =Ω(N2), but Las Vegas complexity only AT Las Vegas 2 =O (N poly(logN)). (The Las Vegas algorithm always decides correctly, but T is only the expected running time; A is the area of the chip).
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A problem is presented with deterministic VLSI complexity AT det 2 =Ω(N2), but Las Vegas complexity only AT Las Vegas 2 =O (N poly(logN)). (The Las Vegas algorithm always decides correctly, but T is only the expected running time; A is the area of the chip).
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