Results 171 to 180 of about 47,374 (229)
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Image processing with VLSI

Microprocessors and Microsystems, 1983
A large variety of tasks in the fields of image processing and numerical computation demand a very high instruction throughput. The figure of 109 instructions/sec has for instance been cited as representing typical computational load for tasks in low-level image processing).
A. G. Corry   +4 more
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The business of VLSI

Software & Microsystems, 1983
Very large scale integration (VLSI) represents not only the threshold of a capability for combiningover 100 000 electronic components on a die of silicon, but also yet another stage in the growth of a volatile industry. The incredible feat of harnessing a wide range of technologies to achieve this degree of integration, and even hold out the prospect ...
openaire   +1 more source

Optoelectronic-VLSI: Photonics Integrated With VLSI Circuits

IEEE Journal of Selected Topics in Quantum Electronics, 1998
Optoelectronic-VLSI (OE-VLSI) technology represents the intimate integration of photonic devices with silicon VLSI electronics. We review the motivations and status of emerging OE-VLSI technologies and examine the performance of OE-VLSI technology versus conventional wire-bonded OE packaging.
K W Goossen, A V Krishnamoorthy
exaly   +2 more sources

Intelligent memories in VLSI

Information Sciences, 1984
A concept of an intelligent memory, called an adaptive associative system (AAS), is described from the system level down to the device level. The performance of an AAS is discussed by means of computer simulations in regard to text processing and pattern recognition, especially such outstanding features as fault tolerance, semantic association ...
Goser, Karl   +2 more
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Optoelectronic/VLSI

IEEE Transactions on Advanced Packaging, 1997
A great goal of optics in computing is the eventual failure of electrical interconnects. This leads to two guiding principles for smart pixel technologies, which integrate optoelectronic devices to electronics for optical read-in/out. One, that the electronics be state-of-the-art, or, in other words, not compromised by the integration with ...
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The VLSI Handbook

1999
VLSI TECHNOLOGY Bipolar Technology B. Gunnar Malm, Jan V. Grahn and Mikael Ostling CMOS/BiCMOS Technology Yasuhiro Katsumata, Tatsuya Ohguro, Kazumi Inoh, Eiji Morifuji, Takashi Yoshitomi, Hideki Kimijima, Hideaki Nii, Toyota Morimoto, Hisayo S.
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Architecture and VLSI design of a VLSI neural signal processor

1993 IEEE International Symposium on Circuits and Systems, 2002
A chip based on a scalable parallel systolic VLSI architecture has been designed for executing the compute-bound algorithmic primitives used by search and learning algorithms in neural networks and low level signal processing. The signal processor executes the algorithmic primitives and shared by all neural nets.
Ulrich Ramacher   +3 more
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Optimization of VLSI allocation

Proceedings of ISCAS'95 - International Symposium on Circuits and Systems, 2002
Allocation is one of main tasks in the high level synthesis. It includes module selection, functional unit allocation, storage allocation and interconnection allocation. In this paper, we model the allocation problem as cluster analysis and apply a new algorithm, neighbor state transition (NST) algorithm, for cluster optimization. It is proved that the
Zhongli He, Dian Zhou
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The VLSI Complexity of Sorting

IEEE Transactions on Computers, 1981
The area-time complexity of sorting is analyzed under an updated model of VLSI computation. The new model makes a distinction between "processing" circuits and "memory" circuits; the latter are less important since they are denser and consume less power. Other adjustments to the model make it possible to compare pipelined and nonpipelined designs.
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Fourier Transforms in VLSI

IEEE Transactions on Computers, 1983
This paper surveys nine designs for VLSI circuits that compute N-element Fourier transforms. The largest of the designs requires O(N2 log N) units of silicon area; it can start a new Fourier transform every O(log N) time units. The smallest designs have about 1/Nth of this throughput, but they require only 1/Nth as much area.
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