Results 31 to 40 of about 13,582,659 (253)
The use of field-programmable gate arrays for the hardware acceleration of design automation tasks [PDF]
This paper investigates the possibility of using Field-Programmable Gate Arrays (Fr’GAS) as reconfigurable co-processors for workstations to produce moderate speedups for most tasks in the design process, resulting in a worthwhile overall design ...
Allinson, Nigel M. +2 more
core +2 more sources
A high-performance method of automated heartbeat classification based on Convolutional Neural Network (CNN) is proposed in this paper. To make full use of the electrocardiogram information acquired from different parts of the human body, we present a ...
Feiteng Li +3 more
doaj +1 more source
A Neural Network-Based ECG Classification Processor With Exploitation of Heartbeat Similarity
This paper presents a neural network based processor with improved computation efficiency, which aims at multiclass heartbeat recognition in wearable devices.
Jiaquan Wu +4 more
doaj +1 more source
Convolutional neural networks (CNNs) based deep learning algorithms require high data flow and computational intensity. For real-time industrial applications, they need to overcome challenges such as high data bandwidth requirement and power consumption ...
Shuai Li +4 more
doaj +1 more source
Analysis and Design of a Low-Voltage High-Precision Switched-Capacitor Delta–Sigma Modulator
Low-voltage delta–sigma modulators (DSMs) have broad application prospects in power-constrained sensor systems but with undeveloped energy efficiency.
Weiqiang Chen +3 more
doaj +1 more source
A neuromorphic VLSI design for spike timing and rate based synaptic plasticity [PDF]
Triplet-based Spike Timing Dependent Plasticity (TSTDP) is a powerful synaptic plasticity rule that acts beyond conventional pair-based STDP (PSTDP). Here, the TSTDP is capable of reproducing the outcomes from a variety of biological experiments, while ...
M. Azghadi +3 more
semanticscholar +1 more source
SEMI-CUSTOM DESIGN OF MULTIPLY-ACCUMULATE UNIT [PDF]
In this research work, a novel approach to design a low-power 16-bit Multiply-Accumulate (MAC) unit for deep neural network (DNN) accelerators is presented. The approach integrates the Karatsuba Algorithm, Vedic multiplier using Urdhva Tiryagbhyam Sutra,
Christopher C R , Umadevi S
doaj +1 more source
Objective: investigation of the extra-low-frequency (ELF) stimulation effect on blood-cell proteins, that causes variation in its electrostatic-state.
Ibtisam A. Abbas Al-Darkazly +1 more
doaj +1 more source
A Rectangular Area Filling Display System Architecture [PDF]
A display system architecture which has rectangular area filling as its primitive operation is presented. It is shown that lines can be drawn significantly faster while rendition of filled boxes shows an O(n^2) speed improvement.
Whalen, Daniel S
core +1 more source
A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems [PDF]
We present a 32 32 pixels contrast retina microchip that provides its output as an address event representation (AER) stream. Spatial contrast is computed as the ratio between pixel photocurrent and a local average between neighboring pixels obtained ...
Costas Santos, Jesús +3 more
core +1 more source

