Results 51 to 60 of about 13,582,659 (253)
A New Strategy to Design Reconfigurable Rivest–Shamir–Adleman (RSA) Accelerators
A reconfigurable FPGA‐based RSA accelerator is proposed using compression‐based modular multipliers combined with pseudomoduli arithmetic. The approach maps modular exponentiation to low‐cost arithmetic domains and applies a correction stage, achieving significant improvements in delay, operating frequency, and delay–area efficiency compared with ...
Augusto C. B. Vassoler +4 more
wiley +1 more source
This work explores the conversion from residues to binary representation in RNS using the Chinese remainder theorem (CRT) or mixed radix conversion (MRC) algorithms. The proposed approach relocates CRT multiplicative inverses to the arithmetic stage without extra cost, improving scalability while achieving speedups over state‐of‐the‐art MRC ...
Gabriel B. M. Fernandes +2 more
wiley +1 more source
FPGA Implementation of Mean – Max Membership basedDefuzzifier Unit [PDF]
The output of fuzzification process, a fuzzy data, is unsuitable for real time applications and needs to be converted into a crisp value. The process of defuzzification is very important and has a significant impact on the overall performance of a fuzzy ...
Asim M. Murshid
doaj +1 more source
An Electromigration and Thermal Model of Power Wires for a Priori High-Level Reliability Prediction [PDF]
In this paper, a simple power-distribution electrothermal model including the interconnect self-heating is used together with a statistical model of average and rms currents of functional blocks and a high-level model of fanout distribution and ...
Casu, Mario Roberto +4 more
core +1 more source
A Coarse Geometric Approach to Graph Layout Problems
ABSTRACT We define a range of new coarse geometric invariants based on various graph–theoretic measures of complexity for finite graphs, including treewidth, pathwidth, cutwidth and bandwidth. We prove that, for bounded degree graphs, these invariants can be used to define functions which satisfy a strong monotonicity property, namely, they are ...
Wanying Huang +3 more
wiley +1 more source
We developed an ultrasensitive and highly selective biosensor by integrating bio‐functionalized reduced graphene oxide (rGO) electrolyte‐gated transistors (EGTs) and machine learning (ML) to detect miRNAs (miR‐34a, miR‐34b, and miR‐34c) associated with cancer and neurological disorders.
Ana Vitória Ferreira Deleigo +7 more
wiley +1 more source
We report a resistance based threshold logic family useful for mimicking brain like large variable logic functions in VLSI. A universal Boolean logic cell based on an analog resistive divider and threshold logic circuit is presented.
Francis, L. R. V. J. +2 more
core +1 more source
An Innovative Approach to Multi‐Valued Logic
The current generation of computer systems operates on the principles of binary logic, which encompasses both logical and arithmetic operations. However, silicon technology has reached its peak performance, prompting researchers to explore alternative methods for enhancing computational efficiency. One such method is the adoption of Multi‐Valued Logic (
Ali Mokhtari, Peyman Kabiri
wiley +1 more source
In this study the principal focus is to examine the influence of psychological stress (both positive and negative stress) on the human articulation and to determine the vocal tract transfer function of an individual using inverse filtering technique ...
Puneet Kumar Mongia, R. K. Sharma
doaj +1 more source
Auxeticity‑by‑Assembly converts freeform photovoltaics from cut‑defined layouts to assembly‑defined systems. Standardized interlocking units generate negative‑Poisson‑ratio, reconfigurable architectures, while hinge regions are wired by selectively activatable AgNW–GO@EGaIn composite interconnects and a folding‑enabled interconnector layer. A decimeter‑
Seok Joon Hwang +15 more
wiley +1 more source

