Results 111 to 120 of about 1,693 (144)
Open Mathematics, 2016 Some of the next articles are maybe not open access.
Related searches:
Related searches:
A description of 𝐴_{∞}-weights for VMO
Proceedings of the American Mathematical Society, 2023We present a new characterization of Muckenhoupt A ∞ A_{\infty } -weights whose logarithm is in vanishing mean oscillation ( R ) (\mathbb {R}) in terms of vanishing Carleson measures on R + 2 \
Jinsong Liu, Fei Tao, Huaying Wei
openaire +1 more source
On the Distance of an Analytic Function to VMO
Journal of the London Mathematical Society, 1986In this paper one deals mainly with the question whether a given analytic function on the unit disc belongs to VMO, the space of functions of vanishing mean oscilation, in terms of the cluster sets of the function. For bounded functions one proves that an analytic function whose cluster set at every point of the unit circle has the rational ...
Carmona, Juan José, Cufí, Julià
openaire +1 more source
Microelectronics Reliability, 1978
Present state of the art MOS devices with 1000 A thick gate oxides have breakdown voltages in the 60-80 volts range. VMOS devices with the same oxide thickness have lower breakdown voltages (25-30 volts) due to higher fields in the oxide at the bottom of the V-groove.
I. S. Bhatti, E. Fuller, F. B. Jenne
openaire +2 more sources
Present state of the art MOS devices with 1000 A thick gate oxides have breakdown voltages in the 60-80 volts range. VMOS devices with the same oxide thickness have lower breakdown voltages (25-30 volts) due to higher fields in the oxide at the bottom of the V-groove.
I. S. Bhatti, E. Fuller, F. B. Jenne
openaire +2 more sources
1979 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1979
This paper will cover a 64Kb dynamic RAM built with VMOS technology, featuring a folded bit line/sense amplifier configuration.
D. Essl, R. Losehand, B. Rehn
openaire +1 more source
This paper will cover a 64Kb dynamic RAM built with VMOS technology, featuring a folded bit line/sense amplifier configuration.
D. Essl, R. Losehand, B. Rehn
openaire +1 more source
IEEE Journal of Solid-State Circuits, 1977
VMOS technology is discussed as it applies to semiconductor memory. A 45-ns 1-kbit static RAM with a die size of 81 mil/spl times/125 mil and a cell area of 3.0 square mils is presented. The device is fabricated with the original grounded-source version of the VMOS process.
T. Rodgers +5 more
openaire +1 more source
VMOS technology is discussed as it applies to semiconductor memory. A 45-ns 1-kbit static RAM with a die size of 81 mil/spl times/125 mil and a cell area of 3.0 square mils is presented. The device is fabricated with the original grounded-source version of the VMOS process.
T. Rodgers +5 more
openaire +1 more source
Quaternionic Beltrami Equations with VMO Coefficients
The Journal of Geometric Analysis, 2013zbMATH Open Web Interface contents unavailable due to conflicting licenses.
openaire +2 more sources
1978 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1978
This paper will discuss the application of VMOS technology in the design of one-transistor 150 μm2memory cells using existing photolithography. The development permits fabrication of a 64K RAM in a 16-pin package.
K. Hoffmann, R. Losehand, K. Zapf
openaire +1 more source
This paper will discuss the application of VMOS technology in the design of one-transistor 150 μm2memory cells using existing photolithography. The development permits fabrication of a 64K RAM in a 16-pin package.
K. Hoffmann, R. Losehand, K. Zapf
openaire +1 more source
VMO solutions of the n-laplacian
Comptes Rendus de l'Académie des Sciences - Series I - Mathematics, 1997We consider the homogeneous Dirichlet problem for the equation -div(A(x, Du))=μ in an open bounded set μ ⊂ on, where the differential operator is like the N-Laplacian and where μ is a Radon measure. We prove that such a problem admits a solution υ which is locally BMO in Ω.
Vincenzo Ferone, Nicola Fusco
openaire +1 more source
ICM 2000. Proceedings of the 12th International Conference on Microelectronics. (IEEE Cat. No.00EX453), 2002
Partial-product reduction circuits (compressors) are of capital importance in the design of high performance parallel multipliers. This paper proposes compressor designs based on threshold gates which have been implemented as vMOS circuits. A typical block, a (4,2) compressor, is fully developed. Data for a (6,2) compressor are also provided.
J.M. Quintana +3 more
openaire +1 more source
Partial-product reduction circuits (compressors) are of capital importance in the design of high performance parallel multipliers. This paper proposes compressor designs based on threshold gates which have been implemented as vMOS circuits. A typical block, a (4,2) compressor, is fully developed. Data for a (6,2) compressor are also provided.
J.M. Quintana +3 more
openaire +1 more source